15 #define MC_RGM_DES_F_POR(v)             FIELD_PREP(MC_RGM_DES_F_POR_MASK, (v))  argument
19 #define MC_RGM_FES_F_EXR(v)             FIELD_PREP(MC_RGM_FES_F_EXR_MASK, (v))  argument
27 #define MC_RGM_FREC_FREC(v)             FIELD_PREP(MC_RGM_FREC_FREC_MASK, (v))  argument
31 #define MC_RGM_FRET_FRET(v)             FIELD_PREP(MC_RGM_FRET_FRET_MASK, (v))  argument
35 #define MC_RGM_DRET_DRET(v)             FIELD_PREP(MC_RGM_DRET_DRET_MASK, (v))  argument
39 #define MC_RGM_ERCTRL_ERASSERT(v)       FIELD_PREP(MC_RGM_ERCTRL_ERASSERT_MASK, (v))  argument
43 #define MC_RGM_RDSS_DES_RES(v)          FIELD_PREP(MC_RGM_RDSS_DES_RES_MASK, (v))  argument
44 #define MC_RGM_RDSS_FES_RES_MASK        BIT(1)
45 #define MC_RGM_RDSS_FES_RES(v)          FIELD_PREP(MC_RGM_RDSS_FES_RES_MASK, (v))  argument
49 #define MC_RGM_FRENTC_FRET_EN(v)        FIELD_PREP(MC_RGM_FRENTC_FRET_EN_MASK, (v))  argument
50 #define MC_RGM_FRENTC_FRET_TIMEOUT_MASK GENMASK(31, 1)
51 #define MC_RGM_FRENTC_FRET_TIMEOUT(v)   FIELD_PREP(MC_RGM_FRENTC_FRET_TIMEOUT_MASK, (v))  argument
55 #define MC_RGM_LPDEBUG_LP_DBG_EN(v)     FIELD_PREP(MC_RGM_LPDEBUG_LP_DBG_EN_MASK, (v))  argument
61 #define REG_WRITE(r, v) sys_write32((v), (mem_addr_t)(DT_INST_REG_ADDR(0) + (r)))  argument
68 	 * Register bits are cleared on write 1 if the triggering event has already  in mc_rgm_clear_reset_status()
83 	 * MC_RGM_FES must be cleared before writing 1 to any of the fields in MC_RGM_FERD,  in mc_rgm_init()
122 DEVICE_DT_INST_DEFINE(0, mc_rgm_init, NULL, NULL, 0, PRE_KERNEL_1, 1, NULL);