Lines Matching +full:internal +full:- +full:osc +full:- +full:disable
2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
32 * Internal capatitor bank is required in order to use the more stable OSC32K source in clock_init()
36 .enableInternalCapBank = true, /* Internal capacitance bank is enabled */ in clock_init()
42 /* Disable ROSC Monitor, because switching the source would generate an expected error */ in clock_init()
53 /* Re-enable monitor */ in clock_init()
55 /* Disable the FRO32K to save power */ in clock_init()
98 /* OSC-RF / System Oscillator Configuration */ in clock_init()
105 /* Init OSC-RF / SOSC */ in clock_init()
109 /* Slow internal reference clock (SIRC) configuration */ in clock_init()
200 base->STATUSA |= VBAT_STATUSA_POR_DET_MASK; in vbat_init()
207 /* disable interrupts */ in soc_early_init_hook()