Lines Matching +full:clock +full:- +full:select

2 # SPDX-License-Identifier: Apache-2.0
5 	select HAS_MCUX
6 	select HAS_MCUX_FLEXCOMM
7 	select HAS_MCUX_SYSCON
8 	select HAS_MCUX_WWDT
9 	select CPU_CORTEX_M_HAS_SYSTICK
10 	select CPU_CORTEX_M_HAS_DWT
11 	select SOC_RESET_HOOK
14 	select CPU_CORTEX_M33
15 	select CPU_HAS_ARM_SAU
16 	select CPU_HAS_ARM_MPU
17 	select CPU_HAS_FPU
18 	select ARMV8_M_DSP
19 	select ARM_TRUSTZONE_M
20 	select HAS_MCUX_IAP if !TRUSTED_EXECUTION_NONSECURE
21 	select HAS_MCUX_RNG
24 	select CPU_CORTEX_M33
25 	select CPU_HAS_ARM_SAU
26 	select CPU_HAS_ARM_MPU
27 	select CPU_HAS_FPU
28 	select ARMV8_M_DSP
29 	select ARM_TRUSTZONE_M
30 	select HAS_MCUX_IAP if !TRUSTED_EXECUTION_NONSECURE
31 	select HAS_MCUX_MCAN
32 	select HAS_MCUX_RNG
35 	select CPU_CORTEX_M33
36 	select CPU_HAS_ARM_SAU
37 	select CPU_HAS_ARM_MPU
38 	select CPU_HAS_FPU
39 	select ARMV8_M_DSP
40 	select HAS_MCUX_IAP
41 	select HAS_MCUX_LPADC
42 	select HAS_MCUX_LPC_DMA
43 	select HAS_MCUX_RNG
44 	select HAS_MCUX_SCTIMER
47 	select CPU_CORTEX_M33
48 	select CPU_HAS_ARM_SAU
49 	select CPU_HAS_ARM_MPU
50 	select CPU_HAS_FPU
51 	select ARMV8_M_DSP
52 	select HAS_MCUX_IAP
53 	select HAS_MCUX_LPADC
54 	select HAS_MCUX_LPC_DMA
55 	select HAS_MCUX_RNG
56 	select HAS_MCUX_SCTIMER
59 	select CPU_CORTEX_M33
60 	select CPU_HAS_ARM_SAU
61 	select CPU_HAS_ARM_MPU
62 	select CPU_HAS_FPU
63 	select ARMV8_M_DSP
64 	select ARM_TRUSTZONE_M
65 	select HAS_MCUX_MCAN
66 	select HAS_MCUX_PWM
69 	select CPU_CORTEX_M33
72 	select CPU_HAS_ARM_SAU
73 	select CPU_HAS_ARM_MPU
74 	select CPU_HAS_FPU
75 	select ARMV8_M_DSP
76 	select ARM_TRUSTZONE_M
77 	select HAS_MCUX_IAP
78 	select HAS_MCUX_LPADC
79 	select HAS_MCUX_LPC_DMA
80 	select HAS_MCUX_USB_LPCIP3511
81 	select HAS_MCUX_CTIMER
82 	select HAS_MCUX_SCTIMER
83 	select HAS_MCUX_RNG
84 	select HAS_PM
97 	  core clock value at it's highest frequency which clocks at 150MHz.
99 	  this PLL should not be used as the core clock in those cases.
112 	bool "CLock LPC SRAM banks"