Lines Matching +full:0 +full:x180

15 #define FLEXSPI_CFG_BLK_TAG     (0x42464346UL)
16 #define FLEXSPI_CFG_BLK_VERSION (0x56010400UL)
21 #define CMD_INDEX_READ 0
26 #define CMD_LUT_SEQ_IDX_READ 0
31 #define CMD_SDR 0x01
32 #define CMD_DDR 0x21
33 #define RADDR_SDR 0x02
34 #define RADDR_DDR 0x22
35 #define CADDR_SDR 0x03
36 #define CADDR_DDR 0x23
37 #define MODE1_SDR 0x04
38 #define MODE1_DDR 0x24
39 #define MODE2_SDR 0x05
40 #define MODE2_DDR 0x25
41 #define MODE4_SDR 0x06
42 #define MODE4_DDR 0x26
43 #define MODE8_SDR 0x07
44 #define MODE8_DDR 0x27
45 #define WRITE_SDR 0x08
46 #define WRITE_DDR 0x28
47 #define READ_SDR 0x09
48 #define READ_DDR 0x29
49 #define LEARN_SDR 0x0A
50 #define LEARN_DDR 0x2A
51 #define DATSZ_SDR 0x0B
52 #define DATSZ_DDR 0x2B
53 #define DUMMY_SDR 0x0C
54 #define DUMMY_DDR 0x2C
55 #define DUMMY_RWDS_SDR 0x0D
56 #define DUMMY_RWDS_DDR 0x2D
57 #define JMP_ON_CS 0x1F
58 #define STOP 0
60 #define FLEXSPI_1PAD 0
128 kFlexSPIReadSampleClk_LoopbackInternally = 0,
137 kFlexSpiMiscOffset_DiffClkEnable = 0,
161 kFlexSpiDeviceType_MCP_NOR_NAND = 0x12,
163 kFlexSpiDeviceType_MCP_NOR_RAM = 0x13,
183 /* !< Switch to 0-4-4/0-8-8 mode */
196 /* !< [0x000-0x003] Tag, fixed value 0x42464346UL */
198 /* !< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */
200 /* !< [0x008-0x00b] Reserved for future use */
202 /* !< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */
204 /* !< [0x00d-0x00d] CS hold time, default value: 3 */
206 /* !< [0x00e-0x00e] CS setup time, default value: 3 */
208 /* !< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For */
211 /* !< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */
213 /* !< [0x011-0x011] Specify the configuration command
218 /* !< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for */
221 /* !< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt */
224 /* !< [0x018-0x01b] Argument/Parameter for device configuration */
226 /* !< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */
228 /* !< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */
230 /* !< [0x020-0x02b] Sequence info for Device Configuration command, similar as
234 /* !< [0x02c-0x02f] Reserved for future use */
236 /* !< [0x030-0x03b] Arguments/Parameters for device Configuration commands */
238 /* !< [0x03c-0x03f] Reserved for future use */
240 /* !< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more */
243 /* !< [0x044-0x044] Device Type: See Flash Type Definition for more details */
245 /* !< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */
247 /* !< [0x046-0x046] Serial Flash Frequency, device specific definitions, See System Boot */
250 /* !< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot */
253 /* !< [0x048-0x04f] Reserved for future use */
255 /* !< [0x050-0x053] Size of Flash connected to A1 */
257 /* !< [0x054-0x057] Size of Flash connected to A2 */
259 /* !< [0x058-0x05b] Size of Flash connected to B1 */
261 /* !< [0x05c-0x05f] Size of Flash connected to B2 */
263 /* !< [0x060-0x063] CS pad setting override value */
265 /* !< [0x064-0x067] SCK pad setting override value */
267 /* !< [0x068-0x06b] data pad setting override value */
269 /* !< [0x06c-0x06f] DQS pad setting override value */
271 /* !< [0x070-0x073] Timeout threshold for read status command */
273 /* !< [0x074-0x077] CS deselect interval between two commands */
275 /* !< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns */
277 /* !< [0x07c-0x07d] Busy offset, valid value: 0-31 */
279 /* !< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - */
281 /* ! busy flag is 0 when flash device is busy */
282 /* !< [0x080-0x17f] Lookup table holds Flash command sequences */
284 /* !< [0x180-0x1af] Customizable LUT Sequences */
286 /* !< [0x1b0-0x1bf] Reserved for future use */
325 /* !< Serial NOR Flash type: 0/1/2/3 */