Lines Matching +full:crc +full:- +full:enabled
5 # SPDX-License-Identifier: Apache-2.0
10 # -i in_file.bin -o out_file.bin
11 # [-chip <name>] [-v|-vv]
12 # [-nohcrc] [-nofcrc] [-ph <offset>]
13 # [-flashsize <1|2|4|8|16>]
14 # [-spimaxclk <20|25|33|40|50>]
15 # [-spireadmode <normal|fast|dual|quad>]
112 INVALID_INPUT = -1
115 BYTES_TO_PAD = HDR_FW_HEADER_SIG_OFFSET - RESERVED_BYTES_OFFSET
166 :returns: output file path object, or -1 if fails
173 exit_with_failure("Define input file, using -i flag")
231 print(f'- HDR - FW Header ANCHOR - Offset '
232 f'{HDR_ANCHOR_OFFSET} - {_hex_print_format(FW_HDR_ANCHOR)}')
254 print(f'- HDR - Header EXTENDED ANCHOR - Offset'
255 f' {HDR_EXTENDED_ANCHOR_OFFSET} - {anchor_to_print}')
263 firmware header offset is a non-negative integer.
293 if input_file_size - HEADER_SIZE < paste_fw_offset:
307 Bits 2-0 - SPI MAX Clock
330 message = f'Invalid SPI Core Clock Ratio (3) - it should be 1 or 2'
360 message += '- it should be 20, 25, 33, 40 or 50 MHz'
365 print(f'- HDR - SPI flash MAX Clock - Offset '
366 f'{HDR_SPI_MAX_CLK_OFFSET} - '
377 Bits 2-0 - SPI Flash Read Mode
412 print(f'- HDR - SPI flash Read Mode - Offset '
413 f'{HDR_SPI_READ_MODE_OFFSET} - '
419 """writes the error detection configuration value (enabled/disabled)
436 print(f'- HDR - FW CRC Enabled - Offset '
437 f'{HDR_ERR_DETECTION_CONF_OFFSET} - '
500 print(f'- HDR - FW load start address - Offset '
501 f'{HDR_FW_LOAD_START_ADDR_OFFSET} - '
526 message = f'-usearmrst not allowed, FW entry point already set using '\
527 f'-fwep !'
556 print(f'- HDR - FW Entry point - Offset '
557 f'{HDR_FW_ENTRY_POINT_OFFSET} - '
561 """writes the fw crc start address and the crc size to the output file.
563 --crc start address should be 4 byte aligned, bigger than crc end address
564 --crc size should be 4 byte aligned, and be set to firmware length minus
565 crc start offset by default
566 --crc end address is crc start address + crc size bytes
578 fw_crc_end = ecst_args.firmware_length - 1
579 # default value for crc size
580 fw_crc_size = ecst_args.firmware_length - fw_crc_start
583 fw_crc_end = fw_crc_start + fw_crc_size - 1
591 message = f'Firmware crc offset address ' \
596 message = f'CRC start address ({fw_crc_start_to_print}) should' \
597 f' be less or equal to CRC end address ({fw_crc_end_to_print}) \n'
601 message = f'Firmware crc size ({fw_crc_size_to_print}) ' \
605 if fw_crc_end > ecst_args.firmware_length - 1:
606 message = f'CRC end address ({fw_crc_end_to_print}) should be less' \
621 print(f'- HDR - FW CRC Start - Offset '
622 f'{HDR_FW_ERR_DETECT_START_ADDR_OFFSET} - '
625 print(f'- HDR - FW CRC End - Offset '
626 f'{HDR_FW_ERR_DETECT_END_ADDR_OFFSET} - '
646 print(f'- HDR - FW Length - Offset '
647 f'{HDR_FW_LENGTH_OFFSET} - '
688 f' please note - for 0.5 MBytes flash, enter \'1\' '
693 print(f'- HDR - Flash size - Offset '
694 f'{HDR_FLASH_SIZE_OFFSET} - '
713 """writes the firmware header crc signature (4 bytes)
721 # calculating crc only if the header crc check is enabled
734 crc = _finalize_crc(crc_calc)
735 crc_to_write = crc.to_bytes(4, "little")
736 crc_to_print = _hex_print_format(crc)
744 print(f'- HDR - Header CRC - Offset '
745 f'{HDR_FW_HEADER_SIG_OFFSET} - '
749 """writes the firmware image crc signature (4 bytes)
755 # calculating crc only if the image crc check is enabled
770 crc = _finalize_crc(crc_calc)
771 crc_to_write = crc.to_bytes(4, "little")
772 crc_to_print = _hex_print_format(crc)
780 print(f'- HDR - Header CRC - Offset '
781 f'{HDR_FW_IMAGE_SIG_OFFSET} - '
805 bytes_to_pad_num = abs((16 - input_file_size) % 16)
812 i -= 1
821 ecst_args.firmware_length = input_file_size - HEADER_SIZE - \
908 """helper for crc calculation"""
920 def _crc_update(cur, crc, table): argument
921 """helper for crc calculation
924 :param crc
929 tmp = crc ^ l_crc
930 crc = (crc >> 8) ^ table[(tmp & 0xff)]
931 return crc
933 def _finalize_crc(crc): argument
934 """helper for crc calculation
936 :param crc
940 current_bit = crc & (1 << j)
942 final_crc |= current_bit << (NUM_OF_BYTES - 1) - j