Lines Matching full:opcode
109 * Transmit one byte opcode at 1X (no DMA).
136 * SAF Opcode 32-bit register value.
137 * Each byte contain a SPI flash 8-bit opcode.
138 * NOTE1: opcode value of 0 = flash does not support this operation
140 * SAF Opcode A
141 * op0 = SPI flash write-enable opcode
142 * op1 = SPI flash program/erase suspend opcode
143 * op2 = SPI flash program/erase resume opcode
144 * op3 = SPI flash read STATUS1 opcode
145 * SAF Opcode B
146 * op0 = SPI flash erase 4KB sector opcode
147 * op1 = SPI flash erase 32KB sector opcode
148 * op2 = SPI flash erase 64KB sector opcode
149 * op3 = SPI flash page program opcode
150 * SAF Opcode C
151 * op0 = SPI flash read 1-4-4 continuous mode opcode
154 * op3 = SPI flash read STATUS2 opcode
175 * Six QMSPI descriptors describe SPI flash opcode protocols.
218 /* Enter Continuous mode: transmit-single CM quad read opcode */
240 /* Enter Continuous mode: transmit-single CM dual read opcode */
274 * b[7:0] = continuous mode prefix opcode
275 * b[15:8] = continuous mode prefix opcode data
301 * Six QMSPI descriptors describe SPI flash opcode protocols.
305 /* Continuous Mode Read: Transmit-quad opcode plus 32-bit address */
325 /* Enter Continuous mode: transmit-single CM quad read opcode */
407 * SPI opcodes for SAF Opcode A register
408 * SPI opcodes for SAF Opcode B register
409 * SPI opcodes for SAF Opcode C register
410 * SPI opcodes for SAF Opcode D register: power down/up and
418 * QMSPI descriptors describing SPI opcode transmit and data read.