Lines Matching full:8
36 * Size 8-bit
61 * b[14:8] = Slave address 2
69 * Data register, 8-bit
85 #define MCHP_I2C_SMB_MSTR_CMD_START0 BIT(8)
97 #define MCHP_I2C_SMB_MSTR_CMD_B1_START0 BIT((8 - 8))
98 #define MCHP_I2C_SMB_MSTR_CMD_B1_STARTN BIT((9 - 8))
99 #define MCHP_I2C_SMB_MSTR_CMD_B1_STOP BIT((10 - 8))
100 #define MCHP_I2C_SMB_MSTR_CMD_B1_PEC_TERM BIT((11 - 8))
101 #define MCHP_I2C_SMB_MSTR_CMD_B1_READM BIT((12 - 8))
102 #define MCHP_I2C_SMB_MSTR_CMD_B1_READ_PEC BIT((13 - 8))
110 #define MCHP_I2C_SMB_SLV_WR_CNT_POS 8u
113 /* Offset 0x14 PEC CRC register, 8-bit read-write */
116 /* Offset 0x18 Repeated Start Hold Time register, 8-bit read-write */
128 #define MCHP_I2C_SMB_CMPL_DTO_RWC BIT(8)
162 #define MCHP_I2C_SMB_CFG_FEN BIT(8)
181 #define MCHP_I2C_SMB_BUS_CLK_HI_POS 8u
183 /* Offset 0x30 Block ID register, 8-bit read-only */
187 /* Offset 0x34 Block Revision register, 8-bit read-only */
191 /* Offset 0x38 Bit-Bang Control register, 8-bit read-write */
213 #define MCHP_I2C_SMB_DATA_TM_RESTART_POS 8u
229 #define MCHP_I2C_SMB_TMTSC_SLV_POS 8u
239 /* Offset 0x48 Follower Transmit Buffer register 8-bit read-write */
242 /* Offset 0x4C Follower Receive Buffer register 8-bit read-write */
245 /* Offset 0x50 Leader Transmit Buffer register 8-bit read-write */
248 /* Offset 0x54 Leader Receive Buffer register 8-bit read-write */