Lines Matching +full:11 +full:- +full:bit

4  * SPDX-License-Identifier: Apache-2.0
54 /* bit[8] output buffer type: push-pull or open-drain */
56 #define MCHP_GPIO_CTRL_BUFT_MASK	BIT(MCHP_GPIO_CTRL_BUFT_POS)
57 #define MCHP_GPIO_CTRL_BUFT_OPENDRAIN	BIT(MCHP_GPIO_CTRL_BUFT_POS)
60 /* bit[9] direction */
62 #define MCHP_GPIO_CTRL_DIR_MASK		BIT(MCHP_GPIO_CTRL_DIR_POS)
63 #define MCHP_GPIO_CTRL_DIR_OUTPUT	BIT(MCHP_GPIO_CTRL_DIR_POS)
67  * bit[10] Alternate output disable. Default==0(alternate output enabled)
68  * GPIO output value is controlled by bit[16] of this register.
69  * Set bit[10]=1 if you wish to control pin output using the parallel
70  * GPIO output register bit for this pin.
73 #define MCHP_GPIO_CTRL_AOD_MASK		BIT(MCHP_GPIO_CTRL_AOD_POS)
74 #define MCHP_GPIO_CTRL_AOD_DIS		BIT(MCHP_GPIO_CTRL_AOD_POS)
76 /* bit[11] GPIO function output polarity */
77 #define MCHP_GPIO_CTRL_POL_POS		11
78 #define MCHP_GPIO_CTRL_POL_INVERT	BIT(MCHP_GPIO_CTRL_POL_POS)
99  * bit[15] Disables input pad leaving output pad enabled
103 #define MCHP_GPIO_CTRL_INPAD_DIS_MASK	BIT(MCHP_GPIO_CTRL_INPAD_DIS_POS)
104 #define MCHP_GPIO_CTRL_INPAD_DIS	BIT(MCHP_GPIO_CTRL_INPAD_DIS_POS)
106 /* bit[16]: Alternate output pin value. Enabled when bit[10]==0(default) */
108 #define MCHP_GPIO_CTRL_OUTV_HI		BIT(MCHP_GPIO_CTRL_OUTVAL_POS)
110 /* bit[24] Input pad value. Always live unless input pad is powered down */
112 #define MCHP_GPIO_CTRL_INPAD_VAL_HI	BIT(MCHP_GPIO_CTRL_INPAD_VAL_POS)
121  * bit[0] = slew rate: 0=slow, 1=fast
126  * 11b = 12mA
131 #define MCHP_GPIO_CTRL2_SLEW_FAST	BIT(MCHP_GPIO_CTRL2_SLEW_POS)