Lines Matching +full:4 +full:u
34 #define MCHP_ECS_DCTRL_DBG_EN_POS 0u
36 #define MCHP_ECS_DCTRL_MODE_POS 1u
41 #define MCHP_ECS_DCTRL_DBG_MODE_POS 1u
43 #define MCHP_ECS_DCTRL_MODE_SWD SHLU32(0x02u, 1u)
44 #define MCHP_ECS_DCTRL_MODE_SWD_SWV SHLU32(0x01u, 1u)
45 #define MCHP_ECS_DCTRL_PUEN_POS 3u
47 #define MCHP_ECS_DCTRL_BSCAN_POS 4u
78 #define MCHP_ECS_JTCC_CLK_DFLT 3u
79 #define MCHP_ECS_JTCC_CLK_24M 1u
80 #define MCHP_ECS_JTCC_CLK_12M 2u
81 #define MCHP_ECS_JTCC_CLK_6M 3u
82 #define MCHP_ECS_JTCC_CLK_3M 4u
83 #define MCHP_ECS_JTCC_CLK_1500K 5u
84 #define MCHP_ECS_JTCC_CLK_750K 6u
85 #define MCHP_ECS_JTCC_CLK_375K 7u
114 #define MCHP_ECS_ACC_EN1 BIT(4)
130 #define MCHP_ECS_EMBR_TMOUT_6S 0u
131 #define MCHP_ECS_EMBR_TMOUT_7S 1u
132 #define MCHP_ECS_EMBR_TMOUT_8S 2u
133 #define MCHP_ECS_EMBR_TMOUT_9S 3u
134 #define MCHP_ECS_EMBR_TMOUT_10S 4u
135 #define MCHP_ECS_EMBR_TMOUT_11S 5u
136 #define MCHP_ECS_EMBR_TMOUT_12S 6u
137 #define MCHP_ECS_EMBR_TMOUT_14S 7u
178 uint32_t RSVD8[(0xb0 - 0x9c) / 4];
183 uint32_t RSVD9[(0x144 - 0xc0) / 4];