Lines Matching full:opcode
85 * Transmit one byte opcode at 1X (no DMA).
112 * SAF Opcode 32-bit register value.
113 * Each byte contain a SPI flash 8-bit opcode.
114 * NOTE1: opcode value of 0 = flash does not support this operation
116 * SAF Opcode A
117 * op0 = SPI flash write-enable opcode
118 * op1 = SPI flash program/erase suspend opcode
119 * op2 = SPI flash program/erase resume opcode
120 * op3 = SPI flash read STATUS1 opcode
121 * SAF Opcode B
122 * op0 = SPI flash erase 4KB sector opcode
123 * op1 = SPI flash erase 32KB sector opcode
124 * op2 = SPI flash erase 64KB sector opcode
125 * op3 = SPI flash page program opcode
126 * SAF Opcode C
127 * op0 = SPI flash read 1-4-4 continuous mode opcode
130 * op3 = SPI flash read STATUS2 opcode
150 * Six QMSPI descriptors describe SPI flash opcode protocols.
175 /* Enter Continuous mode: transmit-single CM quad read opcode */
206 * b[7:0] = continuous mode prefix opcode
207 * b[15:8] = continuous mode prefix opcode data
222 * Six QMSPI descriptors describe SPI flash opcode protocols.
226 /* Continuous Mode Read: Transmit-quad opcode plus 32-bit address */
246 /* Enter Continuous mode: transmit-single CM quad read opcode */
313 * SPI opcodes for SAF Opcode A register
314 * SPI opcodes for SAF Opcode B register
315 * SPI opcodes for SAF Opcode C register
316 * QMSPI descriptors describing SPI opcode transmit and