Lines Matching +full:timers +full:- +full:count

4  * SPDX-License-Identifier: Apache-2.0
13 /* Basic timers */
19 /* Base frequency of all basic timers is AHB clock */
24  * Basic Timer Count Register (Offset +00h)
25  * 32-bit R/W
26  * 16-bit Basic timers: bits[15:0]=R/W, bits[31:15]=RO=0
32  * 32-bit R/W
33  * 16-bit Basic timers: bits[15:0]=R/W, bits[31:15]=RO=0
87  * Set count resolution in bit[0]
99  * to the CNT (count) register.
100  * Writing a non-zero value resets and start the counter counting down.
117 /* Control register at offset 0x00. Must use 32-bit access */
199 /* Sub-second interrupt select at +0x10 */
218 /* Sub-week control at +0x14 */
241 /* Sub-week alarm counter at +0x18 */