1323 #define IT8XXX2_SMB_HOSTA(base)     ECREG(base + 0x00)  argument
1324 #define IT8XXX2_SMB_HOCTL(base)     ECREG(base + 0x01)  argument
1325 #define IT8XXX2_SMB_HOCMD(base)     ECREG(base + 0x02)  argument
1326 #define IT8XXX2_SMB_TRASLA(base)    ECREG(base + 0x03)  argument
1327 #define IT8XXX2_SMB_D0REG(base)     ECREG(base + 0x04)  argument
1328 #define IT8XXX2_SMB_D1REG(base)     ECREG(base + 0x05)  argument
1329 #define IT8XXX2_SMB_HOBDB(base)     ECREG(base + 0x06)  argument
1330 #define IT8XXX2_SMB_PECERC(base)    ECREG(base + 0x07)  argument
1331 #define IT8XXX2_SMB_SMBPCTL(base)   ECREG(base + 0x0A)  argument
1332 #define IT8XXX2_SMB_HOCTL2(base)    ECREG(base + 0x10)  argument
1353 #define IT8XXX2_I2C_DRR(base)         ECREG(base + 0x00)  argument
1354 #define IT8XXX2_I2C_PSR(base)         ECREG(base + 0x01)  argument
1355 #define IT8XXX2_I2C_HSPR(base)        ECREG(base + 0x02)  argument
1356 #define IT8XXX2_I2C_STR(base)         ECREG(base + 0x03)  argument
1357 #define IT8XXX2_I2C_DHTR(base)        ECREG(base + 0x04)  argument
1358 #define IT8XXX2_I2C_TOR(base)         ECREG(base + 0x05)  argument
1359 #define IT8XXX2_I2C_DTR(base)         ECREG(base + 0x08)  argument
1360 #define IT8XXX2_I2C_CTR(base)         ECREG(base + 0x09)  argument
1361 #define IT8XXX2_I2C_CTR1(base)        ECREG(base + 0x0A)  argument
1362 #define IT8XXX2_I2C_BYTE_CNT_H(base)  ECREG(base + 0x0B)  argument
1363 #define IT8XXX2_I2C_BYTE_CNT_L(base)  ECREG(base + 0x0C)  argument
1364 #define IT8XXX2_I2C_IRQ_ST(base)      ECREG(base + 0x0D)  argument
1365 #define IT8XXX2_I2C_IDR(base)         ECREG(base + 0x06)  argument
1366 #define IT8XXX2_I2C_TOS(base)         ECREG(base + 0x07)  argument
1367 #define IT8XXX2_I2C_SLV_NUM_H(base)   ECREG(base + 0x10)  argument
1368 #define IT8XXX2_I2C_SLV_NUM_L(base)   ECREG(base + 0x11)  argument
1369 #define IT8XXX2_I2C_STR2(base)        ECREG(base + 0x12)  argument
1370 #define IT8XXX2_I2C_NST(base)         ECREG(base + 0x13)  argument
1371 #define IT8XXX2_I2C_TO_ARB_ST(base)   ECREG(base + 0x18)  argument
1372 #define IT8XXX2_I2C_ERR_ST(base)      ECREG(base + 0x19)  argument
1373 #define IT8XXX2_I2C_FST(base)         ECREG(base + 0x1B)  argument
1374 #define IT8XXX2_I2C_EM(base)          ECREG(base + 0x1C)  argument
1375 #define IT8XXX2_I2C_MODE_SEL(base)    ECREG(base + 0x1D)  argument
1376 #define IT8XXX2_I2C_IDR2(base)        ECREG(base + 0x1F)  argument
1377 #define IT8XXX2_I2C_CTR2(base)        ECREG(base + 0x20)  argument
1378 #define IT8XXX2_I2C_RAMHA(base)       ECREG(base + 0x23)  argument
1379 #define IT8XXX2_I2C_RAMLA(base)       ECREG(base + 0x24)  argument
1380 #define IT8XXX2_I2C_RAMHA2(base)      ECREG(base + 0x2C)  argument
1381 #define IT8XXX2_I2C_RAMLA2(base)      ECREG(base + 0x2D)  argument
1382 #define IT8XXX2_I2C_CMD_ADDH(base)    ECREG(base + 0x25)  argument
1383 #define IT8XXX2_I2C_CMD_ADDL(base)    ECREG(base + 0x26)  argument
1384 #define IT8XXX2_I2C_RAMH2A(base)      ECREG(base + 0x50)  argument
1385 #define IT8XXX2_I2C_CMD_ADDH2(base)   ECREG(base + 0x52)  argument