Lines Matching refs:ax
21 .macro m_cavs_set_ldo_state state, ax
22 movi \ax, (SHIM_BASE + SHIM_LDOCTL)
23 s32i \state, \ax, 0
26 movi \ax, 128
28 addi \ax, \ax, -1
30 bnez \ax, 1b
33 .macro m_cavs_set_hpldo_state state, ax, ay
34 movi \ax, (SHIM_BASE + SHIM_LDOCTL)
35 l32i \ay, \ax, 0
37 movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK)
38 and \ay, \ax, \ay
41 m_cavs_set_ldo_state \state, \ax
44 .macro m_cavs_set_lpldo_state state, ax, ay
45 movi \ax, (SHIM_BASE + SHIM_LDOCTL)
46 l32i \ay, \ax, 0
48 movi \ax, ~(SHIM_LDOCTL_LPSRAM_MASK)
49 and \ay, \ax, \ay
52 m_cavs_set_ldo_state \state, \ax
55 .macro m_cavs_set_ldo_on_state ax, ay, az
59 movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
60 and \az, \ax, \az
61 movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_ON | SHIM_LDOCTL_LPSRAM_LDO_ON)
62 or \ax, \az, \ax
64 m_cavs_set_ldo_state \ax, \ay
67 .macro m_cavs_set_ldo_off_state ax, ay, az
69 movi \ax, 128
71 addi \ax, \ax, -1
73 bnez \ax, 1b
77 movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
78 and \az, \az, \ax
80 movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_OFF | SHIM_LDOCTL_LPSRAM_LDO_OFF)
81 or \ax, \ax, \az
83 s32i \ax, \ay, 0
84 l32i \ax, \ay, 0
87 .macro m_cavs_set_ldo_bypass_state ax, ay, az
89 movi \ax, 128
91 addi \ax, \ax, -1
93 bnez \ax, 1b
97 movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
98 and \az, \az, \ax
100 movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_BYPASS | SHIM_LDOCTL_LPSRAM_LDO_BYPASS)
101 or \ax, \ax, \az
103 s32i \ax, \ay, 0
104 l32i \ax, \ay, 0