Lines Matching refs:bit
54 while (!SYSCTRL->PCLKSR.bit.OSC8MRDY) { in osc8m_init()
63 while (GCLK->STATUS.bit.SYNCBUSY) { in osc8m_init()
71 while (GCLK->STATUS.bit.SYNCBUSY) { in osc8m_init()
92 while (!SYSCTRL->PCLKSR.bit.OSC32KRDY) { in osc32k_init()
121 while (!SYSCTRL->PCLKSR.bit.XOSCRDY) { in xosc_init()
140 while (!SYSCTRL->PCLKSR.bit.XOSC32KRDY) { in xosc32k_init()
166 while (GCLK->STATUS.bit.SYNCBUSY) { in dfll48m_init()
172 while (GCLK->STATUS.bit.SYNCBUSY) { in dfll48m_init()
201 while (!SYSCTRL->PCLKSR.bit.DFLLRDY) { in dfll48m_init()
203 SYSCTRL->DFLLCTRL.bit.ENABLE = 1; in dfll48m_init()
206 while (!SYSCTRL->PCLKSR.bit.DFLLLCKC || !SYSCTRL->PCLKSR.bit.DFLLLCKF) { in dfll48m_init()
216 NVMCTRL->CTRLB.bit.RWS = NVMCTRL_CTRLB_RWS(CONFIG_SOC_ATMEL_SAMD_NVM_WAIT_STATES); in flash_waitstates_init()
228 while (GCLK->STATUS.bit.SYNCBUSY) { in gclk_main_configure()
236 while (GCLK->STATUS.bit.SYNCBUSY) { in gclk_main_configure()
249 while (GCLK->STATUS.bit.SYNCBUSY) { in gclk_adc_configure()
257 while (GCLK->STATUS.bit.SYNCBUSY) { in gclk_adc_configure()
275 while (GCLK->STATUS.bit.SYNCBUSY) { in gclk_wdt_configure()
285 SYSCTRL->OSC8M.bit.ENABLE = 0; in osc8m_disable()