Lines Matching +full:hal +full:- +full:based
3 * Copyright (c) 2023-2024 Gerson Fernando Budke <nandojve@gmail.com>
4 * SPDX-License-Identifier: Apache-2.0
10 * This file provides routines to initialize and support board-level hardware
42 EFC->EEFC_FMR = EEFC_FMR_FWS(0) | EEFC_FMR_CLOE; in clock_init()
67 * TODO: set FWS based on the actual MCK frequency and VDDIO value in clock_init()
70 EFC->EEFC_FMR = EEFC_FMR_FWS(5) | EEFC_FMR_CLOE; in clock_init()
122 * sys_cache*-functions can enable them, if requested by the in soc_reset_hook()
146 /* Check that the CHIP CIDR matches the HAL one */ in soc_early_init_hook()
147 if (CHIPID->CHIPID_CIDR != CHIP_CIDR) { in soc_early_init_hook()
148 LOG_WRN("CIDR mismatch: chip = 0x%08x vs HAL = 0x%08x", in soc_early_init_hook()
149 (uint32_t)CHIPID->CHIPID_CIDR, (uint32_t)CHIP_CIDR); in soc_early_init_hook()