Lines Matching +full:div +full:- +full:s
2 * Copyright (c) 2016-2017 Piotr Mienkowski
4 * SPDX-License-Identifier: Apache-2.0
86 uint32_t mask; /** pin(s) bit mask */
97 * @brief Configure GPIO pin(s).
101 * - configure pin(s) as input with debounce filter enabled.
102 * - connect pin(s) to a peripheral B and enable pull-up.
103 * - configure pin(s) as open drain output.
106 * @remark The function will enable the GPIO module's clock only if
111 * a pull-up and user wants to read pin's input value it is necessary
112 * to enable GPIO module's clock separately.
114 * @param pin pin's configuration data such as pin mask, pin attributes, etc.
119 * @brief Configure a list of GPIO pin(s).
125 * @param pins an array where each item contains pin's configuration data.
132 * @brief Set pin(s) high.
134 * Set pin(s) defined in the mask parameter to high. The pin(s) have to be
143 pin->regs->OVRS = pin->mask; in soc_gpio_set()
145 pin->regs->PIO_SODR = pin->mask; in soc_gpio_set()
150 * @brief Set pin(s) low.
152 * Set pin(s) defined in the mask field to low. The pin(s) have to be
161 pin->regs->OVRC = pin->mask; in soc_gpio_clear()
163 pin->regs->PIO_CODR = pin->mask; in soc_gpio_clear()
168 * @brief Get pin(s) value.
170 * Get value of the pin(s) defined in the mask field.
173 * @return pin(s) value. To assess value of a specific pin the pin's bit
179 return pin->regs->PVR & pin->mask; in soc_gpio_get()
181 return pin->regs->PIO_PDSR & pin->mask; in soc_gpio_get()
195 * tdiv_slck = ((div + 1) x 2) x tslck
202 * @param div slow clock divider, valid values: from 0 to 2^14 - 1
205 uint32_t div) in soc_gpio_debounce_length_set() argument
208 if (div) { in soc_gpio_debounce_length_set()
209 pin->regs->STERS = pin->mask; in soc_gpio_debounce_length_set()
211 pin->regs->STERC = pin->mask; in soc_gpio_debounce_length_set()
214 pin->regs->PIO_SCDR = PIO_SCDR_DIV(div); in soc_gpio_debounce_length_set()