3  * SPDX-License-Identifier: Apache-2.0
27 	pio->PIO_IDR = mask;  in configure_common_attr()
29 	/* Configure pull-up(s) */  in configure_common_attr()
31 		pio->PIO_PUER = mask;  in configure_common_attr()
33 		pio->PIO_PUDR = mask;  in configure_common_attr()
36 /* Configure pull-down only for MCU series that support it */  in configure_common_attr()
38 	/* Configure pull-down(s) */  in configure_common_attr()
40 		pio->PIO_PPDER = mask;  in configure_common_attr()
42 		pio->PIO_PPDDR = mask;  in configure_common_attr()
46 	/* Configure open drain (multi-drive) */  in configure_common_attr()
48 		pio->PIO_MDER = mask;  in configure_common_attr()
50 		pio->PIO_MDDR = mask;  in configure_common_attr()
59 			/* Enable de-bounce, disable de-glitch */  in configure_input_attr()
61 			pio->PIO_IFSCER = mask;  in configure_input_attr()
63 			pio->PIO_DIFSR = mask;  in configure_input_attr()
66 			/* Disable de-bounce, enable de-glitch */  in configure_input_attr()
68 			pio->PIO_IFSCDR = mask;  in configure_input_attr()
70 			pio->PIO_SCIFSR = mask;  in configure_input_attr()
73 		pio->PIO_IFER = mask;  in configure_input_attr()
75 		pio->PIO_IFDR = mask;  in configure_input_attr()
81 			/* Disable additional interrupt modes, enable the default */  in configure_input_attr()
82 			pio->PIO_AIMDR = mask;  in configure_input_attr()
87 				pio->PIO_ESR = mask;  in configure_input_attr()
90 				pio->PIO_LSR = mask;  in configure_input_attr()
94 				pio->PIO_REHLSR = mask;  in configure_input_attr()
96 				pio->PIO_FELLSR = mask;  in configure_input_attr()
98 			/* Enable additional interrupt mode */  in configure_input_attr()
99 			pio->PIO_AIMER = mask;  in configure_input_attr()
101 		/* Enable interrupts on the pin(s) */  in configure_input_attr()
102 		pio->PIO_IER = mask;  in configure_input_attr()
112 	/* Enable control of the I/O line by the PIO_ODSR register */  in configure_output_attr()
113 	pio->PIO_OWER = mask;  in configure_output_attr()
118 	uint32_t mask = pin->mask;  in soc_gpio_configure()
119 	Pio *pio = pin->regs;  in soc_gpio_configure()
120 	uint8_t periph_id = pin->periph_id;  in soc_gpio_configure()
121 	uint32_t flags = pin->flags;  in soc_gpio_configure()
122 	uint32_t type = pin->flags & SOC_GPIO_FUNC_MASK;  in soc_gpio_configure()
130 		pio->PIO_ABCDSR[0] &= ~mask;  in soc_gpio_configure()
131 		pio->PIO_ABCDSR[1] &= ~mask;  in soc_gpio_configure()
133 		pio->PIO_ABSR &= ~mask;  in soc_gpio_configure()
136 		pio->PIO_PDR = mask;  in soc_gpio_configure()
141 		pio->PIO_ABCDSR[0] |= mask;  in soc_gpio_configure()
142 		pio->PIO_ABCDSR[1] &= ~mask;  in soc_gpio_configure()
144 		pio->PIO_ABSR |= mask;  in soc_gpio_configure()
147 		pio->PIO_PDR = mask;  in soc_gpio_configure()
152 		pio->PIO_ABCDSR[0] &= ~mask;  in soc_gpio_configure()
153 		pio->PIO_ABCDSR[1] |= mask;  in soc_gpio_configure()
155 		pio->PIO_PDR = mask;  in soc_gpio_configure()
159 		pio->PIO_ABCDSR[0] |= mask;  in soc_gpio_configure()
160 		pio->PIO_ABCDSR[1] |= mask;  in soc_gpio_configure()
162 		pio->PIO_PDR = mask;  in soc_gpio_configure()
167 		/* Enable module's clock */  in soc_gpio_configure()
172 		pio->PIO_ODR = mask;  in soc_gpio_configure()
173 		pio->PIO_PER = mask;  in soc_gpio_configure()
180 			pio->PIO_SODR = mask;  in soc_gpio_configure()
182 			pio->PIO_CODR = mask;  in soc_gpio_configure()
188 		pio->PIO_OER = mask;  in soc_gpio_configure()
189 		pio->PIO_PER = mask;  in soc_gpio_configure()