Lines Matching full:apb
33 /* Offset: 0x030 (r/w)APB peripheral access control set */
35 /* Offset: 0x034 (r/w)APB peripheral access control clear */
64 /* Offset: 0x0a0 (r/w) APB peripheral clock set in active state */
66 /* Offset: 0x0a4 (r/w) APB peripheral clock clear in active state */
68 /* Offset: 0x0a8 (r/w) APB peripheral clock set in sleep state */
70 /* Offset: 0x0ac (r/w) APB peripheral clock clear in sleep state */
72 /* Offset: 0x0b0 (r/w) APB peripheral clock set in deep sleep state */
74 /* Offset: 0x0b4 (r/w) APB peripheral clock clear in deep sleep state */
81 /* Offset: 0x0c8 (r/w) APB peripheral reset select set */
83 /* Offset: 0x0cc (r/w) APB peripheral reset select clear */
89 /* Offset: 0x0d8 (r/w) APB power down sleep wakeup source set */
91 /* Offset: 0x0dc (r/w) APB power down sleep wakeup source clear */