Lines Matching +full:0 +full:v

21 # Version 16.0.0 Build 208 04/06/2016 SJ Standard Edition
42 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.0.0
44 set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Standard Edition"
85 set_location_assignment PIN_T20 -to user_led[0]
90 set_location_assignment PIN_L22 -to user_pb[0]
94 set_location_assignment PIN_H21 -to user_dipsw[0]
109 set_location_assignment PIN_N9 -to enet_rx_d[0]
116 set_location_assignment PIN_R5 -to enet_tx_d[0]
124 set_location_assignment PIN_C6 -to qspi_io[0]
142 set_location_assignment PIN_V20 -to mem_a[0]
145 set_location_assignment PIN_V22 -to mem_ba[0]
146 set_location_assignment PIN_U19 -to mem_cas_n[0]
147 set_location_assignment PIN_D18 -to mem_ck[0]
148 set_location_assignment PIN_E18 -to mem_ck_n[0]
149 set_location_assignment PIN_W20 -to mem_cke[0]
150 set_location_assignment PIN_Y22 -to mem_cs_n[0]
151 set_location_assignment PIN_J15 -to mem_dm[0]
159 set_location_assignment PIN_J18 -to mem_dq[0]
160 set_location_assignment PIN_K14 -to mem_dqs[0]
161 set_location_assignment PIN_W19 -to mem_odt[0]
162 set_location_assignment PIN_V18 -to mem_ras_n[0]
164 set_location_assignment PIN_Y21 -to mem_we_n[0]
175 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
180 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to clk_ddr3_100_p
181 set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_50_max10
182 set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_25_max10
184 set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_10_adc
185 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to fpga_resetn
186 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_led[0]
187 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_led[1]
188 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_led[2]
189 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_led[3]
190 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_led[4]
191 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_pb[0]
192 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_pb[1]
193 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_pb[2]
194 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_pb[3]
195 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_dipsw[0]
196 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_dipsw[1]
197 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_dipsw[2]
198 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_dipsw[3]
199 set_instance_assignment -name IO_STANDARD "1.5 V" -to user_dipsw[4]
200 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to user_led[0]
201 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to user_led[2]
202 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to user_pb[1]
203 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_gtx_clk
204 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_intn
205 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_resetn
206 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_clk
207 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_col
208 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_crs
209 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_d[0]
210 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_d[1]
211 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_d[2]
212 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_d[3]
213 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_dv
214 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_rx_er
215 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to enet_tx_clk
216 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_tx_d[0]
217 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_tx_d[1]
218 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_tx_d[2]
219 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_tx_d[3]
220 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_tx_en
221 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_tx_er
222 set_instance_assignment -name IO_STANDARD "2.5 V" -to enet_led_link100
224 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_clk
225 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[0]
226 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[1]
227 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[2]
228 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[3]
229 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_csn
230 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_dq[0] -tag __ghrd_10m50daf484c6ges_mem_…
231 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to mem_dq[0] -ta…
246 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to mem_dqs[0] -tag __ghrd_10m5…
247 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to mem_dqs[0] -t…
248 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to mem_dqs_n[0] -tag __ghrd_10…
249 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to mem_dqs_n[0] …
250 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to mem_ck[0] -tag __ghrd_10m50…
251 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to mem_ck[0] -ta…
252 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to mem_ck_n[0] -tag __ghrd_10m…
253 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to mem_ck_n[0] -…
254 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_a[0] -tag __ghrd_10m50daf484c6ges_mem_i…
267 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_ba[0] -tag __ghrd_10m50daf484c6ges_mem_…
270 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_cs_n[0] -tag __ghrd_10m50daf484c6ges_me…
271 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_we_n[0] -tag __ghrd_10m50daf484c6ges_me…
272 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_ras_n[0] -tag __ghrd_10m50daf484c6ges_m…
273 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_cas_n[0] -tag __ghrd_10m50daf484c6ges_m…
274 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_cke[0] -tag __ghrd_10m50daf484c6ges_mem…
275 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_odt[0] -tag __ghrd_10m50daf484c6ges_mem…
276 set_instance_assignment -name IO_STANDARD 1.5V -to mem_reset_n -tag __ghrd_10m50daf484c6ges_mem_if_…
277 set_instance_assignment -name IO_STANDARD "SSTL-15" -to mem_dm[0] -tag __ghrd_10m50daf484c6ges_mem_…
278 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 40 OHM WITH CALIBRATION" -to mem_dm[0] -ta…
279 set_instance_assignment -name CKN_CK_PAIR ON -from mem_ck_n[0] -to mem_ck[0] -tag __ghrd_10m50daf48…
280 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[0] -tag __ghrd_10m50daf484c6ge…
281 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[1] -tag __ghrd_10m50daf484c6ge…
282 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[2] -tag __ghrd_10m50daf484c6ge…
283 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[3] -tag __ghrd_10m50daf484c6ge…
284 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[4] -tag __ghrd_10m50daf484c6ge…
285 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[5] -tag __ghrd_10m50daf484c6ge…
286 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[6] -tag __ghrd_10m50daf484c6ge…
287 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dq[7] -tag __ghrd_10m50daf484c6ge…
288 set_instance_assignment -name DQ_GROUP 9 -from mem_dqs[0] -to mem_dm[0] -tag __ghrd_10m50daf484c6ge…
289 set_instance_assignment -name DM_PIN ON -to mem_dm[0] -tag __ghrd_10m50daf484c6ges_mem_if_ddr3_emif…
290 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_dq[0] -tag __ghrd_10m50daf484c6…
298 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_dm[0] -tag __ghrd_10m50daf484c6…
299 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_dqs[0] -tag __ghrd_10m50daf484c…
300 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_dqs_n[0] -tag __ghrd_10m50daf48…
301 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_a[0] -tag __ghrd_10m50daf484c6g…
314 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_ba[0] -tag __ghrd_10m50daf484c6…
317 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_cs_n[0] -tag __ghrd_10m50daf484…
318 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_we_n[0] -tag __ghrd_10m50daf484…
319 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_ras_n[0] -tag __ghrd_10m50daf48…
320 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_cas_n[0] -tag __ghrd_10m50daf48…
321 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_cke[0] -tag __ghrd_10m50daf484c…
322 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_odt[0] -tag __ghrd_10m50daf484c…
324 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_ck[0] -tag __ghrd_10m50daf484c6…
325 set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to mem_ck_n[0] -tag __ghrd_10m50daf484…
327 …ys_inst|mem_if_ddr3_emif_0|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[0] -tag __q_sys_mem_if…
331 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to mem_a[4]
332 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to mem_a[1]
333 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to mem_a[7]
334 set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to mem_a[2]
336 …if_ddr3_emif_0_p0_read_datapath_m10:uread_datapath|rdata_per_dq_group[0].reset_n_fifo_wraddress[0]"
337 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to mem_dqs[1] -tag __ghrd_10m5…
339 set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL" -to mem_dqs_n[1] -tag __ghrd_10…
381 …em_inst|mem_if_ddr3_emif_0|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[0] -tag __ghrd_system_…
386 …es_inst|mem_if_ddr3_emif_0|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[0] -tag __ghrd_10m50da…
395 set_global_assignment -name VERILOG_FILE ghrd_10m50da_top.v
405 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_miso
406 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_mosi
407 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_sclk
408 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to spi_ssn
409 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to fpga_reset_n