Lines Matching full:litex

1 .. zephyr:code-sample:: clock-control-litex
2    :name: LiteX clock control driver
5    Use LiteX clock control driver to generate multiple clock signals.
10 This sample is providing an overview of LiteX clock control driver capabilities.
15 * LiteX-capable FPGA platform with MMCM modules (for example Digilent Arty A7 development board)
16 * SoC configuration with VexRiscv soft CPU and Xilinx 7-series MMCM interface in LiteX (S7MMCM modu…
23 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
29 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
35 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
41 …values for FPGA-specific configuration (parameters from ``litex,divclk-divide-min`` to ``litex,vco…
48 …ck Control API <clock_control_api>` function ``clock_control_on()`` and a LiteX driver specific st…
114   [00:00:00.440,000] <inf> CLK_CTRL_LITEX: LiteX Clock Control driver initialized
135 - :ref:`litex-vexriscv`