Lines Matching full:y
9 CONFIG_BT_EXT_ADV=y
10 CONFIG_BT_PER_ADV=y
11 CONFIG_BT_PER_ADV_SYNC=y
13 CONFIG_BT_CENTRAL=y
14 CONFIG_BT_PERIPHERAL=y
17 CONFIG_BT_ISO_BROADCASTER=y
18 CONFIG_BT_ISO_SYNC_RECEIVER=y
19 CONFIG_BT_ISO_CENTRAL=y
20 CONFIG_BT_ISO_PERIPHERAL=y
30 CONFIG_BT_LL_SW_SPLIT=y
31 CONFIG_BT_CTLR_ASSERT_HANDLER=y
32 CONFIG_BT_CTLR_DTM_HCI=y
39 CONFIG_BT_CTLR_PHY_CODED=y
42 CONFIG_BT_CTLR_ADV_EXT=y
47 CONFIG_BT_CTLR_ADVANCED_FEATURES=y
49 CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK=y
51 CONFIG_BT_CTLR_ADV_SYNC_PDU_BACK2BACK=y
56 # CONFIG_BT_CTLR_SCAN_AUX_USE_CHAINS=y
60 CONFIG_BT_CTLR_ADV_ISO_RESERVE_MAX=y
65 CONFIG_BT_CTLR_EVENT_OVERHEAD_RESERVE_MAX=y
67 CONFIG_BT_CTLR_SCAN_UNRESERVED=y
68 CONFIG_BT_TICKER_NEXT_SLOT_GET_MATCH=y
69 CONFIG_BT_TICKER_EXT=y
70 CONFIG_BT_TICKER_EXT_SLOT_WINDOW_YIELD=y
76 CONFIG_BT_CTLR_DF=y
81 CONFIG_BT_CTLR_DF_CTE_TX=y
82 CONFIG_BT_CTLR_DF_CONN_CTE_TX=y
83 CONFIG_BT_CTLR_DF_ANT_SWITCH_TX=y
84 CONFIG_BT_CTLR_DF_CONN_CTE_RSP=y
87 CONFIG_BT_CTLR_DF_CTE_RX=y
88 CONFIG_BT_CTLR_DF_CONN_CTE_RX=y
89 CONFIG_BT_CTLR_DF_ANT_SWITCH_RX=y
90 CONFIG_BT_CTLR_DF_CONN_CTE_REQ=y
93 CONFIG_BT_CTLR_ADV_EXT=y
94 CONFIG_BT_CTLR_ADV_PERIODIC=y
95 CONFIG_BT_CTLR_SYNC_TRANSFER_SENDER=y
96 CONFIG_BT_CTLR_ADV_ISO=y
103 CONFIG_BT_CTLR_ADV_EXT=y
104 CONFIG_BT_CTLR_SYNC_PERIODIC=y
105 CONFIG_BT_CTLR_SYNC_TRANSFER_RECEIVER=y
106 CONFIG_BT_CTLR_SYNC_ISO=y
113 CONFIG_BT_CTLR_CENTRAL_ISO=y
114 CONFIG_BT_CTLR_PERIPHERAL_ISO=y
120 CONFIG_BT_CTLR_CONN_ISO_LOW_LATENCY_POLICY=y
132 CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL=y
135 # CONFIG_BT_CTLR_ISOAL_PSN_IGNORE=y