Lines Matching +full:r0 +full:- +full:6

1 /* SPDX-License-Identifier: MIT */
4 * arch-arm.h
40 * registers, the first argument in x0/r0 (for arm64/arm32 guests
42 * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2,
47 * is an inter-procedure-call scratch register (e.g. for use in linker
52 * The return value is in x0/r0.
55 * by that hypercall (except r0 which is the return value) i.e. in
61 * EABI) and Procedure Call Standard for the ARM 64-bit Architecture
62 * (AAPCS64). Where there is a conflict the 64-bit standard should be
68 * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable.
70 * - hypercall arguments passed via a pointer to guest memory.
71 * - memory shared via the grant table mechanism (including PV I/O
73 * - memory shared with the hypervisor (struct shared_info, struct
94 * All generic sub-operations
97 * All generic sub-operations, with the exception of:
101 * All generic sub-operations, with the exception of:
102 * * SCHEDOP_block -- prefer wfi hardware instruction
105 * All generic sub-operations
108 * All generic sub-operations
111 * All generic sub-operations
114 * No sub-operations are currently supported
117 * All generic sub-operations, with the exception of:
123 * Exactly these sub-operations are supported:
128 * All generic sub-operations
131 * Exactly these sub-operations are supported:
138 * - struct start_info is not exported to ARM guests.
140 * - struct shared_info is mapped by ARM guests using the
141 * HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing
144 * - All the per-cpu struct vcpu_info are mapped by ARM guests using the
145 * HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0
148 * - The grant table is mapped using the HYPERVISOR_memory_op sub-op
154 * - Xenstore is initialized by using the two hvm_params
156 * with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
158 * - The paravirtualized console is initialized by using the two
160 * can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
162 * - Event channel notifications are delivered using the percpu GIC
166 * - The device tree Xen compatible node is fully described under Linux
199 _sxghr_tmp->q = 0; \
200 _sxghr_tmp->p = val; \
209 * Maximum number of virtual CPUs in legacy multi-processor guests.
219 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
225 /* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
325 * Based on the property clock-frequency in the DT timer node.
355 #define PSR_FIQ_MASK (1 << 6) /* Fast Interrupt mask */
360 #define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */