Lines Matching full:tcpc
14 * registry values. They may be used by all TCPC drivers compliant to the TCPCI specification.
25 /** Register address - version of TCPC */
178 /** Register address - TCPC control */
253 * If set, the TCPC will deliver at least the power indicated in the vconn power supported in
263 /** Bit for active looking for a connection by TCPC, both DRP and sink/source only */
299 /** Bit for sinking vbus. If set, the TCPC is sinking vbus to the system load. */
323 /** Bit for vbus at vSafe0V. Set when the TCPC detects that VBUS is below 0.8V. */
362 * Send FRS if TCPC is source with FRS enabled in power control register
365 /** Value for reset transmit buffer - TCPC resets the pointer of transmit buffer to offset 1 */
379 /** Bit for vbus over current reporting - if set, vbus over current is reported by TCPC */
381 /** Bit for vbus over voltage reporting - if set, vbus over voltage is reported by TCPC */
383 /** Bit for bleed discharge - if set, bleed discharge is implemented in TCPC */
385 /** Bit for force discharge - if set, force discharge is implemented in TCPC */
389 * If set, TCPC supports vbus voltage measurement and vbus voltage alarms
397 * since the TCPC has also to support lower values than specified.
427 /** Bit for source vconn - if set, TCPC is capable of switching the vconn source */
429 /** Bit for sink vbus - if set, TCPC is capable of controling the sink path to the system load */
433 * If set, TCPC can control the source high voltage path to vbus
436 /** Bit for source vbus - if set, TCPC is capable of controlling the source path to vbus */
449 * If set, the TCPC supports up to 264 bytes content of the SOP*.
451 * If unset, the TCPC support only 30 bytes content of the SOP* message.
454 /** Bit for SMBus PEC support. If set, SMBus PEC can be enabled in the TCPC control register. */
456 /** Bit for source fast-role swap support. If set, TCPC is capable of sending FRS as source. */
458 /** Bit for sink fast-role swap support. If set, TCPC is capable of sending FRS as sink. */
460 /** Bit for watchdog timer support. If set, watchdog can be enabled in the TCPC control register. */
505 /** Bit for vconn overcurrent fault capable - if set, TCPC can detect the vconn over current */
514 /** Value for no source fast role swap pin present in TCPC */
516 /** Value for source fast role swap input only pin present in TCPC */
518 /** Value for source fast role swap both input and output pin present in TCPC */
520 /** Bit for vbus external over voltage fault. If set, input pin is present in TCPC. */
522 /** Bit for vbus external over current fault. If set, input pin is present in TCPC. */
524 /** Bit for force off vbus present. If set, input pin is present in TCPC. */
612 * If set, the TCPC set as sink shall disable the PD message delivery when the SNK.Open state
614 * If unset, sink TCPC disables the PD message delivery when vbus sink disconnect detected in
618 /** Bit for enable cable reset. If set, TCPC will detect the cable reset signal. */
620 /** Bit for enable hard reset. If set, TCPC will detect the hard reset signal. */
622 /** Bit for enable SOP_DBG'' message. If set, TCPC will detect the SOP_DBG'' messages. */
624 /** Bit for enable SOP_DBG' message. If set, TCPC will detect the SOP_DBG' messages. */
626 /** Bit for enable SOP'' message. If set, TCPC will detect the SOP'' messages. */
628 /** Bit for enable SOP' message. If set, TCPC will detect the SOP' messages. */
630 /** Bit for enable SOP message. If set, TCPC will detect the SOP messages. */
641 * In TCPC Rev 2.0, the RECEIVE_BUFFER is comprised of three sets of registers:
672 * In TCPC Rev 2.0, the TRANSMIT_BUFFER holds the I2C_WRITE_BYTE_COUNT and the