Lines Matching +full:plug +full:- +full:in

3  * SPDX-License-Identifier: Apache-2.0
15  * Registers and fields are compliant to the Type-C Port Controller Interface
19 /** Register address - vendor id */
22 /** Register address - product id */
25 /** Register address - version of TCPC */
28 /** Register address - USB TypeC version */
30 /** Mask for major part of type-c release supported */
32 /** Macro to extract the major part of type-c release supported */
34 /** Mask for minor part of type-c release supported */
36 /** Macro to extract the minor part of type-c release supported */
39 /** Register address - Power delivery revision */
58 /** Register address - interface revision and version */
77 /** Register address - alert */
120  * Register address - alert mask
126  * Register address - power status mask
133  * Register address - fault status mask
140  * Register address - extended status mask
147  * Register address - extended alert mask
153 /** Register address - configure standard output */
165 /** Value for mux - no connection */
167 /** Value for mux - USB3.1 connected */
169 /** Value for mux - DP alternate mode with 4 lanes */
171 /** Value for mux - USB3.1 + DP 0&1 lines */
178 /** Register address - TCPC control */
198 /** Bit for plug orientation and vconn destination */
201 /** Register address - role control */
203 /** Bit for dual-role port */
224 /** Register address - fault control */
237 /** Register address - power control */
253  * If set, the TCPC will deliver at least the power indicated in the vconn power supported in
261 /** Register address - CC lines status */
271  * value of CC2 configuration in Role Control register and on the connect result in this register.
272  * For value interpretation look at the CC_STATUS Register Definition in the TCPCI specification.
280 /** Register address - power status */
284 /** Bit for internal initialization in-progress. If set, only registers 00-0F contain valid data. */
302 /** Register address - fault status */
321 /** Register address - extended status */
326 /** Register address - alert extended */
335 /** Register address - command */
339 /** Value for disable vbus detect command - disable vbus present and vSafe0V detection */
341 /** Value for enable vbus detect command - enable vbus present and vSafe0V detection */
343 /** Value for disable sink vbus - disable sinking power over vbus */
345 /** Value for sink vbus - enable sinking power over vbus and vbus present detection */
347 /** Value for disable source vbus - disable sourcing power over vbus */
349 /** Value for source vbus default voltage - enable sourcing vSafe5V over vbus */
351 /** Value for source vbus high voltage - enable sourcing high voltage over vbus */
353 /** Value for look for connection - start DRP toggling if DRP role is set */
362  * Send FRS if TCPC is source with FRS enabled in power control register
365 /** Value for reset transmit buffer - TCPC resets the pointer of transmit buffer to offset 1 */
375 /** Register address - device capabilities 1 */
377 /** Bit for vbus high voltage target - if set, VBUS_HV_TARGET register is implemented */
379 /** Bit for vbus over current reporting - if set, vbus over current is reported by TCPC */
381 /** Bit for vbus over voltage reporting - if set, vbus over voltage is reported by TCPC */
383 /** Bit for bleed discharge - if set, bleed discharge is implemented in TCPC */
385 /** Bit for force discharge - if set, force discharge is implemented in TCPC */
401 /** Value for Rp default only - only default amperage is supported */
403 /** Value for Rp 1.5A and default - support for 1.5A and for default amperage*/
405 /** Value for Rp 3.0A, 1.5A and default - support for 3.0A, 1.5A and default amperage */
419 /** Value for support dual-role port only */
421 /** Value for support source, sink, dual-role port, adapter and cable */
423 /** Value for support source, sink and dual-role port */
425 /** Bit for debug SOP' and SOP'' support - if set, all SOP* messages are supported */
427 /** Bit for source vconn - if set, TCPC is capable of switching the vconn source */
429 /** Bit for sink vbus - if set, TCPC is capable of controling the sink path to the system load */
436 /** Bit for source vbus - if set, TCPC is capable of controlling the source path to vbus */
439 /** Register address - device capabilities 2 */
454 /** Bit for SMBus PEC support. If set, SMBus PEC can be enabled in the TCPC control register. */
456 /** Bit for source fast-role swap support. If set, TCPC is capable of sending FRS as source. */
458 /** Bit for sink fast-role swap support. If set, TCPC is capable of sending FRS as sink. */
460 /** Bit for watchdog timer support. If set, watchdog can be enabled in the TCPC control register. */
505 /** Bit for vconn overcurrent fault capable - if set, TCPC can detect the vconn over current */
508 /** Register address - standard input capabilities */
514 /** Value for no source fast role swap pin present in TCPC */
516 /** Value for source fast role swap input only pin present in TCPC */
518 /** Value for source fast role swap both input and output pin present in TCPC */
520 /** Bit for vbus external over voltage fault. If set, input pin is present in TCPC. */
522 /** Bit for vbus external over current fault. If set, input pin is present in TCPC. */
524 /** Bit for force off vbus present. If set, input pin is present in TCPC. */
527 /** Register address - standard output capabilities */
546 /** Register address - configure extended 1 */
563  * Register address - generic timer
564  * Available only if generic timer bit is set in device capabilities 2 register.
565  * This register is 16-bit wide and has a resolution of 0.1ms.
569 /** Register address - message header info */
571 /** Bit for cable plug. If set, the message originated from a cable plug. */
601  * non-cable plug
608 /** Register address - receive detect */
613  * is detected for debounce time specified in specification.
614  * If unset, sink TCPC disables the PD message delivery when vbus sink disconnect detected in
640  * Register address - receive buffer (readable byte count, rx buf frame type, rx buf byte x)
641  * In TCPC Rev 2.0, the RECEIVE_BUFFER is comprised of three sets of registers:
647 /** Register address - transmit */
671  * Register address - transmit buffer
672  * In TCPC Rev 2.0, the TRANSMIT_BUFFER holds the I2C_WRITE_BYTE_COUNT and the
674  * data bytes) most recently written by the TCPM in TX_BUF_BYTE_x. TX_BUF_BYTE_x
679 /** Register address - vbus voltage */
700 /** Register address - vbus sink disconnect threshold */
703  * Resolution of the value stored in register.
704  * Value read from register must be multiplied by this value to get a real voltage in mV.
705  * Voltage in mV written to register must be divided by this constant.
714 /** Register address - vbus sink disconnect threshold */
717  * Resolution of the value stored in register.
718  * Value read from register must be multiplied by this value to get a real voltage in mV.
719  * Voltage in mV written to register must be divided by this constant.
728 /** Register address - vbus voltage alarm - high */
731  * Resolution of the value stored in register.
732  * Value read from register must be multiplied by this value to get a real voltage in mV.
733  * Voltage in mV written to register must be divided by this constant.
740 /** Register address - vbus voltage alarm - low */
743  * Resolution of the value stored in register.
744  * Value read from register must be multiplied by this value to get a real voltage in mV.
745  * Voltage in mV written to register must be divided by this constant.
753  * Register address - vbus nondefault target
754  * Available only if vbus nondefault target is asserted in device capabilities 1 register.
760  * Resolution of the value stored in register.
761  * Value read from register must be multiplied by this value to get a real voltage in mV.
762  * Voltage in mV written to register must be divided by this constant.
767 /** Register address - device capabilities 3 */