Lines Matching refs:SILABS_DBUS
16 #define SILABS_DBUS_ACMP0_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 4, 1, 0, 1)
18 #define SILABS_DBUS_CMU_CLKOUT0(port, pin) SILABS_DBUS(port, pin, 7, 1, 0, 2)
19 #define SILABS_DBUS_CMU_CLKOUT1(port, pin) SILABS_DBUS(port, pin, 7, 1, 1, 3)
20 #define SILABS_DBUS_CMU_CLKOUT2(port, pin) SILABS_DBUS(port, pin, 7, 1, 2, 4)
21 #define SILABS_DBUS_CMU_CLKIN0(port, pin) SILABS_DBUS(port, pin, 7, 0, 0, 1)
23 #define SILABS_DBUS_EUSART0_CS(port, pin) SILABS_DBUS(port, pin, 19, 1, 0, 1)
24 #define SILABS_DBUS_EUSART0_RTS(port, pin) SILABS_DBUS(port, pin, 19, 1, 1, 3)
25 #define SILABS_DBUS_EUSART0_RX(port, pin) SILABS_DBUS(port, pin, 19, 1, 2, 4)
26 #define SILABS_DBUS_EUSART0_SCLK(port, pin) SILABS_DBUS(port, pin, 19, 1, 3, 5)
27 #define SILABS_DBUS_EUSART0_TX(port, pin) SILABS_DBUS(port, pin, 19, 1, 4, 6)
28 #define SILABS_DBUS_EUSART0_CTS(port, pin) SILABS_DBUS(port, pin, 19, 0, 0, 2)
30 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 27, 1, 0, 1)
31 #define SILABS_DBUS_PTI_DFRAME(port, pin) SILABS_DBUS(port, pin, 27, 1, 1, 2)
32 #define SILABS_DBUS_PTI_DOUT(port, pin) SILABS_DBUS(port, pin, 27, 1, 2, 3)
34 #define SILABS_DBUS_I2C0_SCL(port, pin) SILABS_DBUS(port, pin, 32, 1, 0, 1)
35 #define SILABS_DBUS_I2C0_SDA(port, pin) SILABS_DBUS(port, pin, 32, 1, 1, 2)
37 #define SILABS_DBUS_I2C1_SCL(port, pin) SILABS_DBUS(port, pin, 36, 1, 0, 1)
38 #define SILABS_DBUS_I2C1_SDA(port, pin) SILABS_DBUS(port, pin, 36, 1, 1, 2)
40 #define SILABS_DBUS_LETIMER0_OUT0(port, pin) SILABS_DBUS(port, pin, 40, 1, 0, 1)
41 #define SILABS_DBUS_LETIMER0_OUT1(port, pin) SILABS_DBUS(port, pin, 40, 1, 1, 2)
43 #define SILABS_DBUS_MODEM_ANT0(port, pin) SILABS_DBUS(port, pin, 44, 1, 0, 1)
44 #define SILABS_DBUS_MODEM_ANT1(port, pin) SILABS_DBUS(port, pin, 44, 1, 1, 2)
45 #define SILABS_DBUS_MODEM_ANTROLLOVER(port, pin) SILABS_DBUS(port, pin, 44, 1, 2, 3)
46 #define SILABS_DBUS_MODEM_ANTRR0(port, pin) SILABS_DBUS(port, pin, 44, 1, 3, 4)
47 #define SILABS_DBUS_MODEM_ANTRR1(port, pin) SILABS_DBUS(port, pin, 44, 1, 4, 5)
48 #define SILABS_DBUS_MODEM_ANTRR2(port, pin) SILABS_DBUS(port, pin, 44, 1, 5, 6)
49 #define SILABS_DBUS_MODEM_ANTRR3(port, pin) SILABS_DBUS(port, pin, 44, 1, 6, 7)
50 #define SILABS_DBUS_MODEM_ANTRR4(port, pin) SILABS_DBUS(port, pin, 44, 1, 7, 8)
51 #define SILABS_DBUS_MODEM_ANTRR5(port, pin) SILABS_DBUS(port, pin, 44, 1, 8, 9)
52 #define SILABS_DBUS_MODEM_ANTSWEN(port, pin) SILABS_DBUS(port, pin, 44, 1, 9, 10)
53 #define SILABS_DBUS_MODEM_ANTSWUS(port, pin) SILABS_DBUS(port, pin, 44, 1, 10, 11)
54 #define SILABS_DBUS_MODEM_ANTTRIG(port, pin) SILABS_DBUS(port, pin, 44, 1, 11, 12)
55 #define SILABS_DBUS_MODEM_ANTTRIGSTOP(port, pin) SILABS_DBUS(port, pin, 44, 1, 12, 13)
56 #define SILABS_DBUS_MODEM_DCLK(port, pin) SILABS_DBUS(port, pin, 44, 1, 13, 14)
57 #define SILABS_DBUS_MODEM_DOUT(port, pin) SILABS_DBUS(port, pin, 44, 1, 14, 16)
58 #define SILABS_DBUS_MODEM_DIN(port, pin) SILABS_DBUS(port, pin, 44, 0, 0, 15)
60 #define SILABS_DBUS_PDM_CLK(port, pin) SILABS_DBUS(port, pin, 62, 1, 0, 1)
61 #define SILABS_DBUS_PDM_DAT0(port, pin) SILABS_DBUS(port, pin, 62, 0, 0, 2)
62 #define SILABS_DBUS_PDM_DAT1(port, pin) SILABS_DBUS(port, pin, 62, 0, 0, 3)
64 #define SILABS_DBUS_PRS0_ASYNCH0(port, pin) SILABS_DBUS(port, pin, 67, 1, 0, 1)
65 #define SILABS_DBUS_PRS0_ASYNCH1(port, pin) SILABS_DBUS(port, pin, 67, 1, 1, 2)
66 #define SILABS_DBUS_PRS0_ASYNCH2(port, pin) SILABS_DBUS(port, pin, 67, 1, 2, 3)
67 #define SILABS_DBUS_PRS0_ASYNCH3(port, pin) SILABS_DBUS(port, pin, 67, 1, 3, 4)
68 #define SILABS_DBUS_PRS0_ASYNCH4(port, pin) SILABS_DBUS(port, pin, 67, 1, 4, 5)
69 #define SILABS_DBUS_PRS0_ASYNCH5(port, pin) SILABS_DBUS(port, pin, 67, 1, 5, 6)
70 #define SILABS_DBUS_PRS0_ASYNCH6(port, pin) SILABS_DBUS(port, pin, 67, 1, 6, 7)
71 #define SILABS_DBUS_PRS0_ASYNCH7(port, pin) SILABS_DBUS(port, pin, 67, 1, 7, 8)
72 #define SILABS_DBUS_PRS0_ASYNCH8(port, pin) SILABS_DBUS(port, pin, 67, 1, 8, 9)
73 #define SILABS_DBUS_PRS0_ASYNCH9(port, pin) SILABS_DBUS(port, pin, 67, 1, 9, 10)
74 #define SILABS_DBUS_PRS0_ASYNCH10(port, pin) SILABS_DBUS(port, pin, 67, 1, 10, 11)
75 #define SILABS_DBUS_PRS0_ASYNCH11(port, pin) SILABS_DBUS(port, pin, 67, 1, 11, 12)
76 #define SILABS_DBUS_PRS0_SYNCH0(port, pin) SILABS_DBUS(port, pin, 67, 1, 12, 13)
77 #define SILABS_DBUS_PRS0_SYNCH1(port, pin) SILABS_DBUS(port, pin, 67, 1, 13, 14)
78 #define SILABS_DBUS_PRS0_SYNCH2(port, pin) SILABS_DBUS(port, pin, 67, 1, 14, 15)
79 #define SILABS_DBUS_PRS0_SYNCH3(port, pin) SILABS_DBUS(port, pin, 67, 1, 15, 16)
81 #define SILABS_DBUS_TIMER0_CC0(port, pin) SILABS_DBUS(port, pin, 85, 1, 0, 1)
82 #define SILABS_DBUS_TIMER0_CC1(port, pin) SILABS_DBUS(port, pin, 85, 1, 1, 2)
83 #define SILABS_DBUS_TIMER0_CC2(port, pin) SILABS_DBUS(port, pin, 85, 1, 2, 3)
84 #define SILABS_DBUS_TIMER0_CDTI0(port, pin) SILABS_DBUS(port, pin, 85, 1, 3, 4)
85 #define SILABS_DBUS_TIMER0_CDTI1(port, pin) SILABS_DBUS(port, pin, 85, 1, 4, 5)
86 #define SILABS_DBUS_TIMER0_CDTI2(port, pin) SILABS_DBUS(port, pin, 85, 1, 5, 6)
88 #define SILABS_DBUS_TIMER1_CC0(port, pin) SILABS_DBUS(port, pin, 93, 1, 0, 1)
89 #define SILABS_DBUS_TIMER1_CC1(port, pin) SILABS_DBUS(port, pin, 93, 1, 1, 2)
90 #define SILABS_DBUS_TIMER1_CC2(port, pin) SILABS_DBUS(port, pin, 93, 1, 2, 3)
91 #define SILABS_DBUS_TIMER1_CDTI0(port, pin) SILABS_DBUS(port, pin, 93, 1, 3, 4)
92 #define SILABS_DBUS_TIMER1_CDTI1(port, pin) SILABS_DBUS(port, pin, 93, 1, 4, 5)
93 #define SILABS_DBUS_TIMER1_CDTI2(port, pin) SILABS_DBUS(port, pin, 93, 1, 5, 6)
95 #define SILABS_DBUS_TIMER2_CC0(port, pin) SILABS_DBUS(port, pin, 101, 1, 0, 1)
96 #define SILABS_DBUS_TIMER2_CC1(port, pin) SILABS_DBUS(port, pin, 101, 1, 1, 2)
97 #define SILABS_DBUS_TIMER2_CC2(port, pin) SILABS_DBUS(port, pin, 101, 1, 2, 3)
98 #define SILABS_DBUS_TIMER2_CDTI0(port, pin) SILABS_DBUS(port, pin, 101, 1, 3, 4)
99 #define SILABS_DBUS_TIMER2_CDTI1(port, pin) SILABS_DBUS(port, pin, 101, 1, 4, 5)
100 #define SILABS_DBUS_TIMER2_CDTI2(port, pin) SILABS_DBUS(port, pin, 101, 1, 5, 6)
102 #define SILABS_DBUS_TIMER3_CC0(port, pin) SILABS_DBUS(port, pin, 109, 1, 0, 1)
103 #define SILABS_DBUS_TIMER3_CC1(port, pin) SILABS_DBUS(port, pin, 109, 1, 1, 2)
104 #define SILABS_DBUS_TIMER3_CC2(port, pin) SILABS_DBUS(port, pin, 109, 1, 2, 3)
105 #define SILABS_DBUS_TIMER3_CDTI0(port, pin) SILABS_DBUS(port, pin, 109, 1, 3, 4)
106 #define SILABS_DBUS_TIMER3_CDTI1(port, pin) SILABS_DBUS(port, pin, 109, 1, 4, 5)
107 #define SILABS_DBUS_TIMER3_CDTI2(port, pin) SILABS_DBUS(port, pin, 109, 1, 5, 6)
109 #define SILABS_DBUS_TIMER4_CC0(port, pin) SILABS_DBUS(port, pin, 117, 1, 0, 1)
110 #define SILABS_DBUS_TIMER4_CC1(port, pin) SILABS_DBUS(port, pin, 117, 1, 1, 2)
111 #define SILABS_DBUS_TIMER4_CC2(port, pin) SILABS_DBUS(port, pin, 117, 1, 2, 3)
112 #define SILABS_DBUS_TIMER4_CDTI0(port, pin) SILABS_DBUS(port, pin, 117, 1, 3, 4)
113 #define SILABS_DBUS_TIMER4_CDTI1(port, pin) SILABS_DBUS(port, pin, 117, 1, 4, 5)
114 #define SILABS_DBUS_TIMER4_CDTI2(port, pin) SILABS_DBUS(port, pin, 117, 1, 5, 6)
116 #define SILABS_DBUS_USART0_CS(port, pin) SILABS_DBUS(port, pin, 125, 1, 0, 1)
117 #define SILABS_DBUS_USART0_RTS(port, pin) SILABS_DBUS(port, pin, 125, 1, 1, 3)
118 #define SILABS_DBUS_USART0_RX(port, pin) SILABS_DBUS(port, pin, 125, 1, 2, 4)
119 #define SILABS_DBUS_USART0_CLK(port, pin) SILABS_DBUS(port, pin, 125, 1, 3, 5)
120 #define SILABS_DBUS_USART0_TX(port, pin) SILABS_DBUS(port, pin, 125, 1, 4, 6)
121 #define SILABS_DBUS_USART0_CTS(port, pin) SILABS_DBUS(port, pin, 125, 0, 0, 2)
123 #define SILABS_DBUS_USART1_CS(port, pin) SILABS_DBUS(port, pin, 133, 1, 0, 1)
124 #define SILABS_DBUS_USART1_RTS(port, pin) SILABS_DBUS(port, pin, 133, 1, 1, 3)
125 #define SILABS_DBUS_USART1_RX(port, pin) SILABS_DBUS(port, pin, 133, 1, 2, 4)
126 #define SILABS_DBUS_USART1_CLK(port, pin) SILABS_DBUS(port, pin, 133, 1, 3, 5)
127 #define SILABS_DBUS_USART1_TX(port, pin) SILABS_DBUS(port, pin, 133, 1, 4, 6)
128 #define SILABS_DBUS_USART1_CTS(port, pin) SILABS_DBUS(port, pin, 133, 0, 0, 2)