Lines Matching +full:4 +full:x8
22 #define SILABS_DBUS_CMU_CLKOUT2(port, pin) SILABS_DBUS(port, pin, 22, 1, 2, 4)
27 #define SILABS_DBUS_EUSART0_RX(port, pin) SILABS_DBUS(port, pin, 33, 1, 2, 4)
29 #define SILABS_DBUS_EUSART0_TX(port, pin) SILABS_DBUS(port, pin, 33, 1, 4, 6)
34 #define SILABS_DBUS_EUSART1_RX(port, pin) SILABS_DBUS(port, pin, 41, 1, 2, 4)
36 #define SILABS_DBUS_EUSART1_TX(port, pin) SILABS_DBUS(port, pin, 41, 1, 4, 6)
41 #define SILABS_DBUS_EUSART2_RX(port, pin) SILABS_DBUS(port, pin, 49, 1, 2, 4)
43 #define SILABS_DBUS_EUSART2_TX(port, pin) SILABS_DBUS(port, pin, 49, 1, 4, 6)
59 #define SILABS_DBUS_KEYSCAN_COLOUT3(port, pin) SILABS_DBUS(port, pin, 70, 1, 3, 4)
60 #define SILABS_DBUS_KEYSCAN_COLOUT4(port, pin) SILABS_DBUS(port, pin, 70, 1, 4, 5)
74 #define SILABS_DBUS_LESENSE_CH3OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 3, 4)
75 #define SILABS_DBUS_LESENSE_CH4OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 4, 5)
94 #define SILABS_DBUS_MODEM_ANTRR0(port, pin) SILABS_DBUS(port, pin, 108, 1, 3, 4)
95 #define SILABS_DBUS_MODEM_ANTRR1(port, pin) SILABS_DBUS(port, pin, 108, 1, 4, 5)
114 #define SILABS_DBUS_PRS0_ASYNCH3(port, pin) SILABS_DBUS(port, pin, 130, 1, 3, 4)
115 #define SILABS_DBUS_PRS0_ASYNCH4(port, pin) SILABS_DBUS(port, pin, 130, 1, 4, 5)
133 #define SILABS_DBUS_TIMER0_CDTI0(port, pin) SILABS_DBUS(port, pin, 174, 1, 3, 4)
134 #define SILABS_DBUS_TIMER0_CDTI1(port, pin) SILABS_DBUS(port, pin, 174, 1, 4, 5)
140 #define SILABS_DBUS_TIMER1_CDTI0(port, pin) SILABS_DBUS(port, pin, 182, 1, 3, 4)
141 #define SILABS_DBUS_TIMER1_CDTI1(port, pin) SILABS_DBUS(port, pin, 182, 1, 4, 5)
147 #define SILABS_DBUS_TIMER2_CDTI0(port, pin) SILABS_DBUS(port, pin, 190, 1, 3, 4)
148 #define SILABS_DBUS_TIMER2_CDTI1(port, pin) SILABS_DBUS(port, pin, 190, 1, 4, 5)
154 #define SILABS_DBUS_TIMER3_CDTI0(port, pin) SILABS_DBUS(port, pin, 198, 1, 3, 4)
155 #define SILABS_DBUS_TIMER3_CDTI1(port, pin) SILABS_DBUS(port, pin, 198, 1, 4, 5)
161 #define SILABS_DBUS_TIMER4_CDTI0(port, pin) SILABS_DBUS(port, pin, 206, 1, 3, 4)
162 #define SILABS_DBUS_TIMER4_CDTI1(port, pin) SILABS_DBUS(port, pin, 206, 1, 4, 5)
167 #define SILABS_DBUS_USART0_RX(port, pin) SILABS_DBUS(port, pin, 214, 1, 2, 4)
169 #define SILABS_DBUS_USART0_TX(port, pin) SILABS_DBUS(port, pin, 214, 1, 4, 6)
180 #define ACMP0_ACMPOUT_PA8 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x8)
198 #define ACMP0_ACMPOUT_PC8 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x8)
215 #define ACMP1_ACMPOUT_PA8 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x8)
233 #define ACMP1_ACMPOUT_PC8 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x8)
250 #define CMU_CLKOUT0_PC8 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x8)
266 #define CMU_CLKOUT1_PC8 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x8)
282 #define CMU_CLKOUT2_PA8 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x8)
300 #define CMU_CLKIN0_PC8 SILABS_DBUS_CMU_CLKIN0(0x2, 0x8)
317 #define EUSART0_CS_PA8 SILABS_DBUS_EUSART0_CS(0x0, 0x8)
335 #define EUSART0_RTS_PA8 SILABS_DBUS_EUSART0_RTS(0x0, 0x8)
353 #define EUSART0_RX_PA8 SILABS_DBUS_EUSART0_RX(0x0, 0x8)
371 #define EUSART0_SCLK_PA8 SILABS_DBUS_EUSART0_SCLK(0x0, 0x8)
389 #define EUSART0_TX_PA8 SILABS_DBUS_EUSART0_TX(0x0, 0x8)
407 #define EUSART0_CTS_PA8 SILABS_DBUS_EUSART0_CTS(0x0, 0x8)
426 #define EUSART1_CS_PA8 SILABS_DBUS_EUSART1_CS(0x0, 0x8)
444 #define EUSART1_CS_PC8 SILABS_DBUS_EUSART1_CS(0x2, 0x8)
460 #define EUSART1_RTS_PA8 SILABS_DBUS_EUSART1_RTS(0x0, 0x8)
478 #define EUSART1_RTS_PC8 SILABS_DBUS_EUSART1_RTS(0x2, 0x8)
494 #define EUSART1_RX_PA8 SILABS_DBUS_EUSART1_RX(0x0, 0x8)
512 #define EUSART1_RX_PC8 SILABS_DBUS_EUSART1_RX(0x2, 0x8)
528 #define EUSART1_SCLK_PA8 SILABS_DBUS_EUSART1_SCLK(0x0, 0x8)
546 #define EUSART1_SCLK_PC8 SILABS_DBUS_EUSART1_SCLK(0x2, 0x8)
562 #define EUSART1_TX_PA8 SILABS_DBUS_EUSART1_TX(0x0, 0x8)
580 #define EUSART1_TX_PC8 SILABS_DBUS_EUSART1_TX(0x2, 0x8)
596 #define EUSART1_CTS_PA8 SILABS_DBUS_EUSART1_CTS(0x0, 0x8)
614 #define EUSART1_CTS_PC8 SILABS_DBUS_EUSART1_CTS(0x2, 0x8)
631 #define EUSART2_CS_PC8 SILABS_DBUS_EUSART2_CS(0x2, 0x8)
647 #define EUSART2_RTS_PC8 SILABS_DBUS_EUSART2_RTS(0x2, 0x8)
663 #define EUSART2_RX_PC8 SILABS_DBUS_EUSART2_RX(0x2, 0x8)
679 #define EUSART2_SCLK_PC8 SILABS_DBUS_EUSART2_SCLK(0x2, 0x8)
695 #define EUSART2_TX_PC8 SILABS_DBUS_EUSART2_TX(0x2, 0x8)
711 #define EUSART2_CTS_PC8 SILABS_DBUS_EUSART2_CTS(0x2, 0x8)
728 #define PTI_DCLK_PC8 SILABS_DBUS_PTI_DCLK(0x2, 0x8)
744 #define PTI_DFRAME_PC8 SILABS_DBUS_PTI_DFRAME(0x2, 0x8)
760 #define PTI_DOUT_PC8 SILABS_DBUS_PTI_DOUT(0x2, 0x8)
777 #define I2C0_SCL_PA8 SILABS_DBUS_I2C0_SCL(0x0, 0x8)
795 #define I2C0_SCL_PC8 SILABS_DBUS_I2C0_SCL(0x2, 0x8)
811 #define I2C0_SDA_PA8 SILABS_DBUS_I2C0_SDA(0x0, 0x8)
829 #define I2C0_SDA_PC8 SILABS_DBUS_I2C0_SDA(0x2, 0x8)
846 #define I2C1_SCL_PC8 SILABS_DBUS_I2C1_SCL(0x2, 0x8)
862 #define I2C1_SDA_PC8 SILABS_DBUS_I2C1_SDA(0x2, 0x8)
879 #define KEYSCAN_COLOUT0_PA8 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x8)
897 #define KEYSCAN_COLOUT0_PC8 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x8)
913 #define KEYSCAN_COLOUT1_PA8 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x8)
931 #define KEYSCAN_COLOUT1_PC8 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x8)
947 #define KEYSCAN_COLOUT2_PA8 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x8)
965 #define KEYSCAN_COLOUT2_PC8 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x8)
981 #define KEYSCAN_COLOUT3_PA8 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x8)
999 #define KEYSCAN_COLOUT3_PC8 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x8)
1015 #define KEYSCAN_COLOUT4_PA8 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x8)
1033 #define KEYSCAN_COLOUT4_PC8 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x8)
1049 #define KEYSCAN_COLOUT5_PA8 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x8)
1067 #define KEYSCAN_COLOUT5_PC8 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x8)
1083 #define KEYSCAN_COLOUT6_PA8 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x8)
1101 #define KEYSCAN_COLOUT6_PC8 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x8)
1117 #define KEYSCAN_COLOUT7_PA8 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x8)
1135 #define KEYSCAN_COLOUT7_PC8 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x8)
1151 #define KEYSCAN_ROWSENSE0_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x8)
1169 #define KEYSCAN_ROWSENSE1_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x8)
1187 #define KEYSCAN_ROWSENSE2_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x8)
1205 #define KEYSCAN_ROWSENSE3_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x8)
1223 #define KEYSCAN_ROWSENSE4_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x8)
1241 #define KEYSCAN_ROWSENSE5_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x8)
1260 #define LESENSE_CH0OUT_PA8 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x8)
1278 #define LESENSE_CH1OUT_PA8 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x8)
1296 #define LESENSE_CH2OUT_PA8 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x8)
1314 #define LESENSE_CH3OUT_PA8 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x8)
1332 #define LESENSE_CH4OUT_PA8 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x8)
1350 #define LESENSE_CH5OUT_PA8 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x8)
1368 #define LESENSE_CH6OUT_PA8 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x8)
1386 #define LESENSE_CH7OUT_PA8 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x8)
1404 #define LESENSE_CH8OUT_PA8 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x8)
1422 #define LESENSE_CH9OUT_PA8 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x8)
1440 #define LESENSE_CH10OUT_PA8 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x8)
1458 #define LESENSE_CH11OUT_PA8 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x8)
1476 #define LESENSE_CH12OUT_PA8 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x8)
1494 #define LESENSE_CH13OUT_PA8 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x8)
1512 #define LESENSE_CH14OUT_PA8 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x8)
1530 #define LESENSE_CH15OUT_PA8 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x8)
1549 #define LETIMER0_OUT0_PA8 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x8)
1567 #define LETIMER0_OUT1_PA8 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x8)
1586 #define MODEM_ANT0_PA8 SILABS_DBUS_MODEM_ANT0(0x0, 0x8)
1604 #define MODEM_ANT0_PC8 SILABS_DBUS_MODEM_ANT0(0x2, 0x8)
1620 #define MODEM_ANT1_PA8 SILABS_DBUS_MODEM_ANT1(0x0, 0x8)
1638 #define MODEM_ANT1_PC8 SILABS_DBUS_MODEM_ANT1(0x2, 0x8)
1654 #define MODEM_ANTROLLOVER_PC8 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x8)
1670 #define MODEM_ANTRR0_PC8 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x8)
1686 #define MODEM_ANTRR1_PC8 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x8)
1702 #define MODEM_ANTRR2_PC8 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x8)
1718 #define MODEM_ANTRR3_PC8 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x8)
1734 #define MODEM_ANTRR4_PC8 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x8)
1750 #define MODEM_ANTRR5_PC8 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x8)
1766 #define MODEM_ANTSWEN_PC8 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x8)
1782 #define MODEM_ANTSWUS_PC8 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x8)
1798 #define MODEM_ANTTRIG_PC8 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x8)
1814 #define MODEM_ANTTRIGSTOP_PC8 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x8)
1830 #define MODEM_DCLK_PA8 SILABS_DBUS_MODEM_DCLK(0x0, 0x8)
1848 #define MODEM_DOUT_PA8 SILABS_DBUS_MODEM_DOUT(0x0, 0x8)
1866 #define MODEM_DIN_PA8 SILABS_DBUS_MODEM_DIN(0x0, 0x8)
1885 #define PCNT0_S0IN_PA8 SILABS_DBUS_PCNT0_S0IN(0x0, 0x8)
1903 #define PCNT0_S1IN_PA8 SILABS_DBUS_PCNT0_S1IN(0x0, 0x8)
1922 #define PRS0_ASYNCH0_PA8 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x8)
1940 #define PRS0_ASYNCH1_PA8 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x8)
1958 #define PRS0_ASYNCH2_PA8 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x8)
1976 #define PRS0_ASYNCH3_PA8 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x8)
1994 #define PRS0_ASYNCH4_PA8 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x8)
2012 #define PRS0_ASYNCH5_PA8 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x8)
2030 #define PRS0_ASYNCH6_PC8 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x8)
2046 #define PRS0_ASYNCH7_PC8 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x8)
2062 #define PRS0_ASYNCH8_PC8 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x8)
2078 #define PRS0_ASYNCH9_PC8 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x8)
2094 #define PRS0_ASYNCH10_PC8 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x8)
2110 #define PRS0_ASYNCH11_PC8 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x8)
2126 #define PRS0_SYNCH0_PA8 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x8)
2144 #define PRS0_SYNCH0_PC8 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x8)
2160 #define PRS0_SYNCH1_PA8 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x8)
2178 #define PRS0_SYNCH1_PC8 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x8)
2194 #define PRS0_SYNCH2_PA8 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x8)
2212 #define PRS0_SYNCH2_PC8 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x8)
2228 #define PRS0_SYNCH3_PA8 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x8)
2246 #define PRS0_SYNCH3_PC8 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x8)
2263 #define HFXO0_BUFOUTREQINASYNC_PA8 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x8)
2282 #define TIMER0_CC0_PA8 SILABS_DBUS_TIMER0_CC0(0x0, 0x8)
2300 #define TIMER0_CC0_PC8 SILABS_DBUS_TIMER0_CC0(0x2, 0x8)
2316 #define TIMER0_CC1_PA8 SILABS_DBUS_TIMER0_CC1(0x0, 0x8)
2334 #define TIMER0_CC1_PC8 SILABS_DBUS_TIMER0_CC1(0x2, 0x8)
2350 #define TIMER0_CC2_PA8 SILABS_DBUS_TIMER0_CC2(0x0, 0x8)
2368 #define TIMER0_CC2_PC8 SILABS_DBUS_TIMER0_CC2(0x2, 0x8)
2384 #define TIMER0_CDTI0_PA8 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x8)
2402 #define TIMER0_CDTI0_PC8 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x8)
2418 #define TIMER0_CDTI1_PA8 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x8)
2436 #define TIMER0_CDTI1_PC8 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x8)
2452 #define TIMER0_CDTI2_PA8 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x8)
2470 #define TIMER0_CDTI2_PC8 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x8)
2487 #define TIMER1_CC0_PA8 SILABS_DBUS_TIMER1_CC0(0x0, 0x8)
2505 #define TIMER1_CC0_PC8 SILABS_DBUS_TIMER1_CC0(0x2, 0x8)
2521 #define TIMER1_CC1_PA8 SILABS_DBUS_TIMER1_CC1(0x0, 0x8)
2539 #define TIMER1_CC1_PC8 SILABS_DBUS_TIMER1_CC1(0x2, 0x8)
2555 #define TIMER1_CC2_PA8 SILABS_DBUS_TIMER1_CC2(0x0, 0x8)
2573 #define TIMER1_CC2_PC8 SILABS_DBUS_TIMER1_CC2(0x2, 0x8)
2589 #define TIMER1_CDTI0_PA8 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x8)
2607 #define TIMER1_CDTI0_PC8 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x8)
2623 #define TIMER1_CDTI1_PA8 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x8)
2641 #define TIMER1_CDTI1_PC8 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x8)
2657 #define TIMER1_CDTI2_PA8 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x8)
2675 #define TIMER1_CDTI2_PC8 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x8)
2692 #define TIMER2_CC0_PA8 SILABS_DBUS_TIMER2_CC0(0x0, 0x8)
2710 #define TIMER2_CC1_PA8 SILABS_DBUS_TIMER2_CC1(0x0, 0x8)
2728 #define TIMER2_CC2_PA8 SILABS_DBUS_TIMER2_CC2(0x0, 0x8)
2746 #define TIMER2_CDTI0_PA8 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x8)
2764 #define TIMER2_CDTI1_PA8 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x8)
2782 #define TIMER2_CDTI2_PA8 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x8)
2801 #define TIMER3_CC0_PC8 SILABS_DBUS_TIMER3_CC0(0x2, 0x8)
2817 #define TIMER3_CC1_PC8 SILABS_DBUS_TIMER3_CC1(0x2, 0x8)
2833 #define TIMER3_CC2_PC8 SILABS_DBUS_TIMER3_CC2(0x2, 0x8)
2849 #define TIMER3_CDTI0_PC8 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x8)
2865 #define TIMER3_CDTI1_PC8 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x8)
2881 #define TIMER3_CDTI2_PC8 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x8)
2898 #define TIMER4_CC0_PA8 SILABS_DBUS_TIMER4_CC0(0x0, 0x8)
2916 #define TIMER4_CC1_PA8 SILABS_DBUS_TIMER4_CC1(0x0, 0x8)
2934 #define TIMER4_CC2_PA8 SILABS_DBUS_TIMER4_CC2(0x0, 0x8)
2952 #define TIMER4_CDTI0_PA8 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x8)
2970 #define TIMER4_CDTI1_PA8 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x8)
2988 #define TIMER4_CDTI2_PA8 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x8)
3007 #define USART0_CS_PA8 SILABS_DBUS_USART0_CS(0x0, 0x8)
3025 #define USART0_CS_PC8 SILABS_DBUS_USART0_CS(0x2, 0x8)
3041 #define USART0_RTS_PA8 SILABS_DBUS_USART0_RTS(0x0, 0x8)
3059 #define USART0_RTS_PC8 SILABS_DBUS_USART0_RTS(0x2, 0x8)
3075 #define USART0_RX_PA8 SILABS_DBUS_USART0_RX(0x0, 0x8)
3093 #define USART0_RX_PC8 SILABS_DBUS_USART0_RX(0x2, 0x8)
3109 #define USART0_CLK_PA8 SILABS_DBUS_USART0_CLK(0x0, 0x8)
3127 #define USART0_CLK_PC8 SILABS_DBUS_USART0_CLK(0x2, 0x8)
3143 #define USART0_TX_PA8 SILABS_DBUS_USART0_TX(0x0, 0x8)
3161 #define USART0_TX_PC8 SILABS_DBUS_USART0_TX(0x2, 0x8)
3177 #define USART0_CTS_PA8 SILABS_DBUS_USART0_CTS(0x0, 0x8)
3195 #define USART0_CTS_PC8 SILABS_DBUS_USART0_CTS(0x2, 0x8)