Lines Matching full:x1
127 #define CMU_CLKOUT0_PC1 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x1)
135 #define CMU_CLKOUT0_PD1 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x1)
139 #define CMU_CLKOUT1_PC1 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x1)
147 #define CMU_CLKOUT1_PD1 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x1)
151 #define CMU_CLKOUT2_PA1 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x1)
159 #define CMU_CLKOUT2_PB0 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x0)
160 #define CMU_CLKOUT2_PB1 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x1)
161 #define CMU_CLKOUT2_PB2 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x2)
162 #define CMU_CLKOUT2_PB3 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x3)
163 #define CMU_CLKOUT2_PB4 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x4)
165 #define CMU_CLKIN0_PC1 SILABS_DBUS_CMU_CLKIN0(0x2, 0x1)
173 #define CMU_CLKIN0_PD1 SILABS_DBUS_CMU_CLKIN0(0x3, 0x1)
178 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1)
186 #define PTI_DCLK_PD1 SILABS_DBUS_PTI_DCLK(0x3, 0x1)
190 #define PTI_DFRAME_PC1 SILABS_DBUS_PTI_DFRAME(0x2, 0x1)
198 #define PTI_DFRAME_PD1 SILABS_DBUS_PTI_DFRAME(0x3, 0x1)
202 #define PTI_DOUT_PC1 SILABS_DBUS_PTI_DOUT(0x2, 0x1)
210 #define PTI_DOUT_PD1 SILABS_DBUS_PTI_DOUT(0x3, 0x1)
215 #define I2C0_SCL_PA1 SILABS_DBUS_I2C0_SCL(0x0, 0x1)
223 #define I2C0_SCL_PB0 SILABS_DBUS_I2C0_SCL(0x1, 0x0)
224 #define I2C0_SCL_PB1 SILABS_DBUS_I2C0_SCL(0x1, 0x1)
225 #define I2C0_SCL_PB2 SILABS_DBUS_I2C0_SCL(0x1, 0x2)
226 #define I2C0_SCL_PB3 SILABS_DBUS_I2C0_SCL(0x1, 0x3)
227 #define I2C0_SCL_PB4 SILABS_DBUS_I2C0_SCL(0x1, 0x4)
229 #define I2C0_SCL_PC1 SILABS_DBUS_I2C0_SCL(0x2, 0x1)
237 #define I2C0_SCL_PD1 SILABS_DBUS_I2C0_SCL(0x3, 0x1)
241 #define I2C0_SDA_PA1 SILABS_DBUS_I2C0_SDA(0x0, 0x1)
249 #define I2C0_SDA_PB0 SILABS_DBUS_I2C0_SDA(0x1, 0x0)
250 #define I2C0_SDA_PB1 SILABS_DBUS_I2C0_SDA(0x1, 0x1)
251 #define I2C0_SDA_PB2 SILABS_DBUS_I2C0_SDA(0x1, 0x2)
252 #define I2C0_SDA_PB3 SILABS_DBUS_I2C0_SDA(0x1, 0x3)
253 #define I2C0_SDA_PB4 SILABS_DBUS_I2C0_SDA(0x1, 0x4)
255 #define I2C0_SDA_PC1 SILABS_DBUS_I2C0_SDA(0x2, 0x1)
263 #define I2C0_SDA_PD1 SILABS_DBUS_I2C0_SDA(0x3, 0x1)
268 #define I2C1_SCL_PC1 SILABS_DBUS_I2C1_SCL(0x2, 0x1)
276 #define I2C1_SCL_PD1 SILABS_DBUS_I2C1_SCL(0x3, 0x1)
280 #define I2C1_SDA_PC1 SILABS_DBUS_I2C1_SDA(0x2, 0x1)
288 #define I2C1_SDA_PD1 SILABS_DBUS_I2C1_SDA(0x3, 0x1)
293 #define LETIMER0_OUT0_PA1 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x1)
301 #define LETIMER0_OUT0_PB0 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x0)
302 #define LETIMER0_OUT0_PB1 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x1)
303 #define LETIMER0_OUT0_PB2 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x2)
304 #define LETIMER0_OUT0_PB3 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x3)
305 #define LETIMER0_OUT0_PB4 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x4)
307 #define LETIMER0_OUT1_PA1 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x1)
315 #define LETIMER0_OUT1_PB0 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x0)
316 #define LETIMER0_OUT1_PB1 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x1)
317 #define LETIMER0_OUT1_PB2 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x2)
318 #define LETIMER0_OUT1_PB3 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x3)
319 #define LETIMER0_OUT1_PB4 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x4)
322 #define EUART0_RTS_PA1 SILABS_DBUS_EUART0_RTS(0x0, 0x1)
330 #define EUART0_RTS_PB0 SILABS_DBUS_EUART0_RTS(0x1, 0x0)
331 #define EUART0_RTS_PB1 SILABS_DBUS_EUART0_RTS(0x1, 0x1)
332 #define EUART0_RTS_PB2 SILABS_DBUS_EUART0_RTS(0x1, 0x2)
333 #define EUART0_RTS_PB3 SILABS_DBUS_EUART0_RTS(0x1, 0x3)
334 #define EUART0_RTS_PB4 SILABS_DBUS_EUART0_RTS(0x1, 0x4)
336 #define EUART0_RTS_PC1 SILABS_DBUS_EUART0_RTS(0x2, 0x1)
344 #define EUART0_RTS_PD1 SILABS_DBUS_EUART0_RTS(0x3, 0x1)
348 #define EUART0_TX_PA1 SILABS_DBUS_EUART0_TX(0x0, 0x1)
356 #define EUART0_TX_PB0 SILABS_DBUS_EUART0_TX(0x1, 0x0)
357 #define EUART0_TX_PB1 SILABS_DBUS_EUART0_TX(0x1, 0x1)
358 #define EUART0_TX_PB2 SILABS_DBUS_EUART0_TX(0x1, 0x2)
359 #define EUART0_TX_PB3 SILABS_DBUS_EUART0_TX(0x1, 0x3)
360 #define EUART0_TX_PB4 SILABS_DBUS_EUART0_TX(0x1, 0x4)
362 #define EUART0_TX_PC1 SILABS_DBUS_EUART0_TX(0x2, 0x1)
370 #define EUART0_TX_PD1 SILABS_DBUS_EUART0_TX(0x3, 0x1)
374 #define EUART0_CTS_PA1 SILABS_DBUS_EUART0_CTS(0x0, 0x1)
382 #define EUART0_CTS_PB0 SILABS_DBUS_EUART0_CTS(0x1, 0x0)
383 #define EUART0_CTS_PB1 SILABS_DBUS_EUART0_CTS(0x1, 0x1)
384 #define EUART0_CTS_PB2 SILABS_DBUS_EUART0_CTS(0x1, 0x2)
385 #define EUART0_CTS_PB3 SILABS_DBUS_EUART0_CTS(0x1, 0x3)
386 #define EUART0_CTS_PB4 SILABS_DBUS_EUART0_CTS(0x1, 0x4)
388 #define EUART0_CTS_PC1 SILABS_DBUS_EUART0_CTS(0x2, 0x1)
396 #define EUART0_CTS_PD1 SILABS_DBUS_EUART0_CTS(0x3, 0x1)
400 #define EUART0_RX_PA1 SILABS_DBUS_EUART0_RX(0x0, 0x1)
408 #define EUART0_RX_PB0 SILABS_DBUS_EUART0_RX(0x1, 0x0)
409 #define EUART0_RX_PB1 SILABS_DBUS_EUART0_RX(0x1, 0x1)
410 #define EUART0_RX_PB2 SILABS_DBUS_EUART0_RX(0x1, 0x2)
411 #define EUART0_RX_PB3 SILABS_DBUS_EUART0_RX(0x1, 0x3)
412 #define EUART0_RX_PB4 SILABS_DBUS_EUART0_RX(0x1, 0x4)
414 #define EUART0_RX_PC1 SILABS_DBUS_EUART0_RX(0x2, 0x1)
422 #define EUART0_RX_PD1 SILABS_DBUS_EUART0_RX(0x3, 0x1)
427 #define MODEM_ANT0_PA1 SILABS_DBUS_MODEM_ANT0(0x0, 0x1)
435 #define MODEM_ANT0_PB0 SILABS_DBUS_MODEM_ANT0(0x1, 0x0)
436 #define MODEM_ANT0_PB1 SILABS_DBUS_MODEM_ANT0(0x1, 0x1)
437 #define MODEM_ANT0_PB2 SILABS_DBUS_MODEM_ANT0(0x1, 0x2)
438 #define MODEM_ANT0_PB3 SILABS_DBUS_MODEM_ANT0(0x1, 0x3)
439 #define MODEM_ANT0_PB4 SILABS_DBUS_MODEM_ANT0(0x1, 0x4)
441 #define MODEM_ANT0_PC1 SILABS_DBUS_MODEM_ANT0(0x2, 0x1)
449 #define MODEM_ANT0_PD1 SILABS_DBUS_MODEM_ANT0(0x3, 0x1)
453 #define MODEM_ANT1_PA1 SILABS_DBUS_MODEM_ANT1(0x0, 0x1)
461 #define MODEM_ANT1_PB0 SILABS_DBUS_MODEM_ANT1(0x1, 0x0)
462 #define MODEM_ANT1_PB1 SILABS_DBUS_MODEM_ANT1(0x1, 0x1)
463 #define MODEM_ANT1_PB2 SILABS_DBUS_MODEM_ANT1(0x1, 0x2)
464 #define MODEM_ANT1_PB3 SILABS_DBUS_MODEM_ANT1(0x1, 0x3)
465 #define MODEM_ANT1_PB4 SILABS_DBUS_MODEM_ANT1(0x1, 0x4)
467 #define MODEM_ANT1_PC1 SILABS_DBUS_MODEM_ANT1(0x2, 0x1)
475 #define MODEM_ANT1_PD1 SILABS_DBUS_MODEM_ANT1(0x3, 0x1)
479 #define MODEM_ANTROLLOVER_PC1 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x1)
487 #define MODEM_ANTROLLOVER_PD1 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x1)
491 #define MODEM_ANTRR0_PC1 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x1)
499 #define MODEM_ANTRR0_PD1 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x1)
503 #define MODEM_ANTRR1_PC1 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x1)
511 #define MODEM_ANTRR1_PD1 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x1)
515 #define MODEM_ANTRR2_PC1 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x1)
523 #define MODEM_ANTRR2_PD1 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x1)
527 #define MODEM_ANTRR3_PC1 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x1)
535 #define MODEM_ANTRR3_PD1 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x1)
539 #define MODEM_ANTRR4_PC1 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x1)
547 #define MODEM_ANTRR4_PD1 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x1)
551 #define MODEM_ANTRR5_PC1 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x1)
559 #define MODEM_ANTRR5_PD1 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x1)
563 #define MODEM_ANTSWEN_PC1 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x1)
571 #define MODEM_ANTSWEN_PD1 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x1)
575 #define MODEM_ANTSWUS_PC1 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x1)
583 #define MODEM_ANTSWUS_PD1 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x1)
587 #define MODEM_ANTTRIG_PC1 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x1)
595 #define MODEM_ANTTRIG_PD1 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x1)
599 #define MODEM_ANTTRIGSTOP_PC1 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x1)
607 #define MODEM_ANTTRIGSTOP_PD1 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x1)
611 #define MODEM_DCLK_PA1 SILABS_DBUS_MODEM_DCLK(0x0, 0x1)
619 #define MODEM_DCLK_PB0 SILABS_DBUS_MODEM_DCLK(0x1, 0x0)
620 #define MODEM_DCLK_PB1 SILABS_DBUS_MODEM_DCLK(0x1, 0x1)
621 #define MODEM_DCLK_PB2 SILABS_DBUS_MODEM_DCLK(0x1, 0x2)
622 #define MODEM_DCLK_PB3 SILABS_DBUS_MODEM_DCLK(0x1, 0x3)
623 #define MODEM_DCLK_PB4 SILABS_DBUS_MODEM_DCLK(0x1, 0x4)
625 #define MODEM_DOUT_PA1 SILABS_DBUS_MODEM_DOUT(0x0, 0x1)
633 #define MODEM_DOUT_PB0 SILABS_DBUS_MODEM_DOUT(0x1, 0x0)
634 #define MODEM_DOUT_PB1 SILABS_DBUS_MODEM_DOUT(0x1, 0x1)
635 #define MODEM_DOUT_PB2 SILABS_DBUS_MODEM_DOUT(0x1, 0x2)
636 #define MODEM_DOUT_PB3 SILABS_DBUS_MODEM_DOUT(0x1, 0x3)
637 #define MODEM_DOUT_PB4 SILABS_DBUS_MODEM_DOUT(0x1, 0x4)
639 #define MODEM_DIN_PA1 SILABS_DBUS_MODEM_DIN(0x0, 0x1)
647 #define MODEM_DIN_PB0 SILABS_DBUS_MODEM_DIN(0x1, 0x0)
648 #define MODEM_DIN_PB1 SILABS_DBUS_MODEM_DIN(0x1, 0x1)
649 #define MODEM_DIN_PB2 SILABS_DBUS_MODEM_DIN(0x1, 0x2)
650 #define MODEM_DIN_PB3 SILABS_DBUS_MODEM_DIN(0x1, 0x3)
651 #define MODEM_DIN_PB4 SILABS_DBUS_MODEM_DIN(0x1, 0x4)
654 #define PDM_CLK_PA1 SILABS_DBUS_PDM_CLK(0x0, 0x1)
662 #define PDM_CLK_PB0 SILABS_DBUS_PDM_CLK(0x1, 0x0)
663 #define PDM_CLK_PB1 SILABS_DBUS_PDM_CLK(0x1, 0x1)
664 #define PDM_CLK_PB2 SILABS_DBUS_PDM_CLK(0x1, 0x2)
665 #define PDM_CLK_PB3 SILABS_DBUS_PDM_CLK(0x1, 0x3)
666 #define PDM_CLK_PB4 SILABS_DBUS_PDM_CLK(0x1, 0x4)
668 #define PDM_CLK_PC1 SILABS_DBUS_PDM_CLK(0x2, 0x1)
676 #define PDM_CLK_PD1 SILABS_DBUS_PDM_CLK(0x3, 0x1)
680 #define PDM_DAT0_PA1 SILABS_DBUS_PDM_DAT0(0x0, 0x1)
688 #define PDM_DAT0_PB0 SILABS_DBUS_PDM_DAT0(0x1, 0x0)
689 #define PDM_DAT0_PB1 SILABS_DBUS_PDM_DAT0(0x1, 0x1)
690 #define PDM_DAT0_PB2 SILABS_DBUS_PDM_DAT0(0x1, 0x2)
691 #define PDM_DAT0_PB3 SILABS_DBUS_PDM_DAT0(0x1, 0x3)
692 #define PDM_DAT0_PB4 SILABS_DBUS_PDM_DAT0(0x1, 0x4)
694 #define PDM_DAT0_PC1 SILABS_DBUS_PDM_DAT0(0x2, 0x1)
702 #define PDM_DAT0_PD1 SILABS_DBUS_PDM_DAT0(0x3, 0x1)
706 #define PDM_DAT1_PA1 SILABS_DBUS_PDM_DAT1(0x0, 0x1)
714 #define PDM_DAT1_PB0 SILABS_DBUS_PDM_DAT1(0x1, 0x0)
715 #define PDM_DAT1_PB1 SILABS_DBUS_PDM_DAT1(0x1, 0x1)
716 #define PDM_DAT1_PB2 SILABS_DBUS_PDM_DAT1(0x1, 0x2)
717 #define PDM_DAT1_PB3 SILABS_DBUS_PDM_DAT1(0x1, 0x3)
718 #define PDM_DAT1_PB4 SILABS_DBUS_PDM_DAT1(0x1, 0x4)
720 #define PDM_DAT1_PC1 SILABS_DBUS_PDM_DAT1(0x2, 0x1)
728 #define PDM_DAT1_PD1 SILABS_DBUS_PDM_DAT1(0x3, 0x1)
733 #define PRS0_ASYNCH0_PA1 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x1)
741 #define PRS0_ASYNCH0_PB0 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x0)
742 #define PRS0_ASYNCH0_PB1 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x1)
743 #define PRS0_ASYNCH0_PB2 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x2)
744 #define PRS0_ASYNCH0_PB3 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x3)
745 #define PRS0_ASYNCH0_PB4 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x4)
747 #define PRS0_ASYNCH1_PA1 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x1)
755 #define PRS0_ASYNCH1_PB0 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x0)
756 #define PRS0_ASYNCH1_PB1 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x1)
757 #define PRS0_ASYNCH1_PB2 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x2)
758 #define PRS0_ASYNCH1_PB3 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x3)
759 #define PRS0_ASYNCH1_PB4 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x4)
761 #define PRS0_ASYNCH2_PA1 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x1)
769 #define PRS0_ASYNCH2_PB0 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x0)
770 #define PRS0_ASYNCH2_PB1 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x1)
771 #define PRS0_ASYNCH2_PB2 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x2)
772 #define PRS0_ASYNCH2_PB3 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x3)
773 #define PRS0_ASYNCH2_PB4 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x4)
775 #define PRS0_ASYNCH3_PA1 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x1)
783 #define PRS0_ASYNCH3_PB0 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x0)
784 #define PRS0_ASYNCH3_PB1 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x1)
785 #define PRS0_ASYNCH3_PB2 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x2)
786 #define PRS0_ASYNCH3_PB3 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x3)
787 #define PRS0_ASYNCH3_PB4 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x4)
789 #define PRS0_ASYNCH4_PA1 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x1)
797 #define PRS0_ASYNCH4_PB0 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x0)
798 #define PRS0_ASYNCH4_PB1 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x1)
799 #define PRS0_ASYNCH4_PB2 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x2)
800 #define PRS0_ASYNCH4_PB3 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x3)
801 #define PRS0_ASYNCH4_PB4 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x4)
803 #define PRS0_ASYNCH5_PA1 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x1)
811 #define PRS0_ASYNCH5_PB0 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x0)
812 #define PRS0_ASYNCH5_PB1 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x1)
813 #define PRS0_ASYNCH5_PB2 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x2)
814 #define PRS0_ASYNCH5_PB3 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x3)
815 #define PRS0_ASYNCH5_PB4 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x4)
817 #define PRS0_ASYNCH6_PC1 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x1)
825 #define PRS0_ASYNCH6_PD1 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x1)
829 #define PRS0_ASYNCH7_PC1 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x1)
837 #define PRS0_ASYNCH7_PD1 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x1)
841 #define PRS0_ASYNCH8_PC1 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x1)
849 #define PRS0_ASYNCH8_PD1 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x1)
853 #define PRS0_ASYNCH9_PC1 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x1)
861 #define PRS0_ASYNCH9_PD1 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x1)
865 #define PRS0_ASYNCH10_PC1 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x1)
873 #define PRS0_ASYNCH10_PD1 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x1)
877 #define PRS0_ASYNCH11_PC1 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x1)
885 #define PRS0_ASYNCH11_PD1 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x1)
889 #define PRS0_SYNCH0_PA1 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x1)
897 #define PRS0_SYNCH0_PB0 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x0)
898 #define PRS0_SYNCH0_PB1 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x1)
899 #define PRS0_SYNCH0_PB2 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x2)
900 #define PRS0_SYNCH0_PB3 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x3)
901 #define PRS0_SYNCH0_PB4 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x4)
903 #define PRS0_SYNCH0_PC1 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x1)
911 #define PRS0_SYNCH0_PD1 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x1)
915 #define PRS0_SYNCH1_PA1 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x1)
923 #define PRS0_SYNCH1_PB0 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x0)
924 #define PRS0_SYNCH1_PB1 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x1)
925 #define PRS0_SYNCH1_PB2 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x2)
926 #define PRS0_SYNCH1_PB3 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x3)
927 #define PRS0_SYNCH1_PB4 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x4)
929 #define PRS0_SYNCH1_PC1 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x1)
937 #define PRS0_SYNCH1_PD1 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x1)
941 #define PRS0_SYNCH2_PA1 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x1)
949 #define PRS0_SYNCH2_PB0 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x0)
950 #define PRS0_SYNCH2_PB1 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x1)
951 #define PRS0_SYNCH2_PB2 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x2)
952 #define PRS0_SYNCH2_PB3 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x3)
953 #define PRS0_SYNCH2_PB4 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x4)
955 #define PRS0_SYNCH2_PC1 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x1)
963 #define PRS0_SYNCH2_PD1 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x1)
967 #define PRS0_SYNCH3_PA1 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x1)
975 #define PRS0_SYNCH3_PB0 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x0)
976 #define PRS0_SYNCH3_PB1 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x1)
977 #define PRS0_SYNCH3_PB2 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x2)
978 #define PRS0_SYNCH3_PB3 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x3)
979 #define PRS0_SYNCH3_PB4 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x4)
981 #define PRS0_SYNCH3_PC1 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x1)
989 #define PRS0_SYNCH3_PD1 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x1)
994 #define TIMER0_CC0_PA1 SILABS_DBUS_TIMER0_CC0(0x0, 0x1)
1002 #define TIMER0_CC0_PB0 SILABS_DBUS_TIMER0_CC0(0x1, 0x0)
1003 #define TIMER0_CC0_PB1 SILABS_DBUS_TIMER0_CC0(0x1, 0x1)
1004 #define TIMER0_CC0_PB2 SILABS_DBUS_TIMER0_CC0(0x1, 0x2)
1005 #define TIMER0_CC0_PB3 SILABS_DBUS_TIMER0_CC0(0x1, 0x3)
1006 #define TIMER0_CC0_PB4 SILABS_DBUS_TIMER0_CC0(0x1, 0x4)
1008 #define TIMER0_CC0_PC1 SILABS_DBUS_TIMER0_CC0(0x2, 0x1)
1016 #define TIMER0_CC0_PD1 SILABS_DBUS_TIMER0_CC0(0x3, 0x1)
1020 #define TIMER0_CC1_PA1 SILABS_DBUS_TIMER0_CC1(0x0, 0x1)
1028 #define TIMER0_CC1_PB0 SILABS_DBUS_TIMER0_CC1(0x1, 0x0)
1029 #define TIMER0_CC1_PB1 SILABS_DBUS_TIMER0_CC1(0x1, 0x1)
1030 #define TIMER0_CC1_PB2 SILABS_DBUS_TIMER0_CC1(0x1, 0x2)
1031 #define TIMER0_CC1_PB3 SILABS_DBUS_TIMER0_CC1(0x1, 0x3)
1032 #define TIMER0_CC1_PB4 SILABS_DBUS_TIMER0_CC1(0x1, 0x4)
1034 #define TIMER0_CC1_PC1 SILABS_DBUS_TIMER0_CC1(0x2, 0x1)
1042 #define TIMER0_CC1_PD1 SILABS_DBUS_TIMER0_CC1(0x3, 0x1)
1046 #define TIMER0_CC2_PA1 SILABS_DBUS_TIMER0_CC2(0x0, 0x1)
1054 #define TIMER0_CC2_PB0 SILABS_DBUS_TIMER0_CC2(0x1, 0x0)
1055 #define TIMER0_CC2_PB1 SILABS_DBUS_TIMER0_CC2(0x1, 0x1)
1056 #define TIMER0_CC2_PB2 SILABS_DBUS_TIMER0_CC2(0x1, 0x2)
1057 #define TIMER0_CC2_PB3 SILABS_DBUS_TIMER0_CC2(0x1, 0x3)
1058 #define TIMER0_CC2_PB4 SILABS_DBUS_TIMER0_CC2(0x1, 0x4)
1060 #define TIMER0_CC2_PC1 SILABS_DBUS_TIMER0_CC2(0x2, 0x1)
1068 #define TIMER0_CC2_PD1 SILABS_DBUS_TIMER0_CC2(0x3, 0x1)
1072 #define TIMER0_CDTI0_PA1 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x1)
1080 #define TIMER0_CDTI0_PB0 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x0)
1081 #define TIMER0_CDTI0_PB1 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x1)
1082 #define TIMER0_CDTI0_PB2 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x2)
1083 #define TIMER0_CDTI0_PB3 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x3)
1084 #define TIMER0_CDTI0_PB4 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x4)
1086 #define TIMER0_CDTI0_PC1 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x1)
1094 #define TIMER0_CDTI0_PD1 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x1)
1098 #define TIMER0_CDTI1_PA1 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x1)
1106 #define TIMER0_CDTI1_PB0 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x0)
1107 #define TIMER0_CDTI1_PB1 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x1)
1108 #define TIMER0_CDTI1_PB2 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x2)
1109 #define TIMER0_CDTI1_PB3 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x3)
1110 #define TIMER0_CDTI1_PB4 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x4)
1112 #define TIMER0_CDTI1_PC1 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x1)
1120 #define TIMER0_CDTI1_PD1 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x1)
1124 #define TIMER0_CDTI2_PA1 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x1)
1132 #define TIMER0_CDTI2_PB0 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x0)
1133 #define TIMER0_CDTI2_PB1 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x1)
1134 #define TIMER0_CDTI2_PB2 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x2)
1135 #define TIMER0_CDTI2_PB3 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x3)
1136 #define TIMER0_CDTI2_PB4 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x4)
1138 #define TIMER0_CDTI2_PC1 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x1)
1146 #define TIMER0_CDTI2_PD1 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x1)
1151 #define TIMER1_CC0_PA1 SILABS_DBUS_TIMER1_CC0(0x0, 0x1)
1159 #define TIMER1_CC0_PB0 SILABS_DBUS_TIMER1_CC0(0x1, 0x0)
1160 #define TIMER1_CC0_PB1 SILABS_DBUS_TIMER1_CC0(0x1, 0x1)
1161 #define TIMER1_CC0_PB2 SILABS_DBUS_TIMER1_CC0(0x1, 0x2)
1162 #define TIMER1_CC0_PB3 SILABS_DBUS_TIMER1_CC0(0x1, 0x3)
1163 #define TIMER1_CC0_PB4 SILABS_DBUS_TIMER1_CC0(0x1, 0x4)
1165 #define TIMER1_CC0_PC1 SILABS_DBUS_TIMER1_CC0(0x2, 0x1)
1173 #define TIMER1_CC0_PD1 SILABS_DBUS_TIMER1_CC0(0x3, 0x1)
1177 #define TIMER1_CC1_PA1 SILABS_DBUS_TIMER1_CC1(0x0, 0x1)
1185 #define TIMER1_CC1_PB0 SILABS_DBUS_TIMER1_CC1(0x1, 0x0)
1186 #define TIMER1_CC1_PB1 SILABS_DBUS_TIMER1_CC1(0x1, 0x1)
1187 #define TIMER1_CC1_PB2 SILABS_DBUS_TIMER1_CC1(0x1, 0x2)
1188 #define TIMER1_CC1_PB3 SILABS_DBUS_TIMER1_CC1(0x1, 0x3)
1189 #define TIMER1_CC1_PB4 SILABS_DBUS_TIMER1_CC1(0x1, 0x4)
1191 #define TIMER1_CC1_PC1 SILABS_DBUS_TIMER1_CC1(0x2, 0x1)
1199 #define TIMER1_CC1_PD1 SILABS_DBUS_TIMER1_CC1(0x3, 0x1)
1203 #define TIMER1_CC2_PA1 SILABS_DBUS_TIMER1_CC2(0x0, 0x1)
1211 #define TIMER1_CC2_PB0 SILABS_DBUS_TIMER1_CC2(0x1, 0x0)
1212 #define TIMER1_CC2_PB1 SILABS_DBUS_TIMER1_CC2(0x1, 0x1)
1213 #define TIMER1_CC2_PB2 SILABS_DBUS_TIMER1_CC2(0x1, 0x2)
1214 #define TIMER1_CC2_PB3 SILABS_DBUS_TIMER1_CC2(0x1, 0x3)
1215 #define TIMER1_CC2_PB4 SILABS_DBUS_TIMER1_CC2(0x1, 0x4)
1217 #define TIMER1_CC2_PC1 SILABS_DBUS_TIMER1_CC2(0x2, 0x1)
1225 #define TIMER1_CC2_PD1 SILABS_DBUS_TIMER1_CC2(0x3, 0x1)
1229 #define TIMER1_CDTI0_PA1 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x1)
1237 #define TIMER1_CDTI0_PB0 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x0)
1238 #define TIMER1_CDTI0_PB1 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x1)
1239 #define TIMER1_CDTI0_PB2 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x2)
1240 #define TIMER1_CDTI0_PB3 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x3)
1241 #define TIMER1_CDTI0_PB4 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x4)
1243 #define TIMER1_CDTI0_PC1 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x1)
1251 #define TIMER1_CDTI0_PD1 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x1)
1255 #define TIMER1_CDTI1_PA1 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x1)
1263 #define TIMER1_CDTI1_PB0 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x0)
1264 #define TIMER1_CDTI1_PB1 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x1)
1265 #define TIMER1_CDTI1_PB2 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x2)
1266 #define TIMER1_CDTI1_PB3 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x3)
1267 #define TIMER1_CDTI1_PB4 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x4)
1269 #define TIMER1_CDTI1_PC1 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x1)
1277 #define TIMER1_CDTI1_PD1 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x1)
1281 #define TIMER1_CDTI2_PA1 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x1)
1289 #define TIMER1_CDTI2_PB0 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x0)
1290 #define TIMER1_CDTI2_PB1 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x1)
1291 #define TIMER1_CDTI2_PB2 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x2)
1292 #define TIMER1_CDTI2_PB3 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x3)
1293 #define TIMER1_CDTI2_PB4 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x4)
1295 #define TIMER1_CDTI2_PC1 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x1)
1303 #define TIMER1_CDTI2_PD1 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x1)
1308 #define TIMER2_CC0_PA1 SILABS_DBUS_TIMER2_CC0(0x0, 0x1)
1316 #define TIMER2_CC0_PB0 SILABS_DBUS_TIMER2_CC0(0x1, 0x0)
1317 #define TIMER2_CC0_PB1 SILABS_DBUS_TIMER2_CC0(0x1, 0x1)
1318 #define TIMER2_CC0_PB2 SILABS_DBUS_TIMER2_CC0(0x1, 0x2)
1319 #define TIMER2_CC0_PB3 SILABS_DBUS_TIMER2_CC0(0x1, 0x3)
1320 #define TIMER2_CC0_PB4 SILABS_DBUS_TIMER2_CC0(0x1, 0x4)
1322 #define TIMER2_CC1_PA1 SILABS_DBUS_TIMER2_CC1(0x0, 0x1)
1330 #define TIMER2_CC1_PB0 SILABS_DBUS_TIMER2_CC1(0x1, 0x0)
1331 #define TIMER2_CC1_PB1 SILABS_DBUS_TIMER2_CC1(0x1, 0x1)
1332 #define TIMER2_CC1_PB2 SILABS_DBUS_TIMER2_CC1(0x1, 0x2)
1333 #define TIMER2_CC1_PB3 SILABS_DBUS_TIMER2_CC1(0x1, 0x3)
1334 #define TIMER2_CC1_PB4 SILABS_DBUS_TIMER2_CC1(0x1, 0x4)
1336 #define TIMER2_CC2_PA1 SILABS_DBUS_TIMER2_CC2(0x0, 0x1)
1344 #define TIMER2_CC2_PB0 SILABS_DBUS_TIMER2_CC2(0x1, 0x0)
1345 #define TIMER2_CC2_PB1 SILABS_DBUS_TIMER2_CC2(0x1, 0x1)
1346 #define TIMER2_CC2_PB2 SILABS_DBUS_TIMER2_CC2(0x1, 0x2)
1347 #define TIMER2_CC2_PB3 SILABS_DBUS_TIMER2_CC2(0x1, 0x3)
1348 #define TIMER2_CC2_PB4 SILABS_DBUS_TIMER2_CC2(0x1, 0x4)
1350 #define TIMER2_CDTI0_PA1 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x1)
1358 #define TIMER2_CDTI0_PB0 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x0)
1359 #define TIMER2_CDTI0_PB1 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x1)
1360 #define TIMER2_CDTI0_PB2 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x2)
1361 #define TIMER2_CDTI0_PB3 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x3)
1362 #define TIMER2_CDTI0_PB4 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x4)
1364 #define TIMER2_CDTI1_PA1 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x1)
1372 #define TIMER2_CDTI1_PB0 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x0)
1373 #define TIMER2_CDTI1_PB1 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x1)
1374 #define TIMER2_CDTI1_PB2 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x2)
1375 #define TIMER2_CDTI1_PB3 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x3)
1376 #define TIMER2_CDTI1_PB4 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x4)
1378 #define TIMER2_CDTI2_PA1 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x1)
1386 #define TIMER2_CDTI2_PB0 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x0)
1387 #define TIMER2_CDTI2_PB1 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x1)
1388 #define TIMER2_CDTI2_PB2 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x2)
1389 #define TIMER2_CDTI2_PB3 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x3)
1390 #define TIMER2_CDTI2_PB4 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x4)
1393 #define TIMER3_CC0_PC1 SILABS_DBUS_TIMER3_CC0(0x2, 0x1)
1401 #define TIMER3_CC0_PD1 SILABS_DBUS_TIMER3_CC0(0x3, 0x1)
1405 #define TIMER3_CC1_PC1 SILABS_DBUS_TIMER3_CC1(0x2, 0x1)
1413 #define TIMER3_CC1_PD1 SILABS_DBUS_TIMER3_CC1(0x3, 0x1)
1417 #define TIMER3_CC2_PC1 SILABS_DBUS_TIMER3_CC2(0x2, 0x1)
1425 #define TIMER3_CC2_PD1 SILABS_DBUS_TIMER3_CC2(0x3, 0x1)
1429 #define TIMER3_CDTI0_PC1 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x1)
1437 #define TIMER3_CDTI0_PD1 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x1)
1441 #define TIMER3_CDTI1_PC1 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x1)
1449 #define TIMER3_CDTI1_PD1 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x1)
1453 #define TIMER3_CDTI2_PC1 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x1)
1461 #define TIMER3_CDTI2_PD1 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x1)
1466 #define TIMER4_CC0_PA1 SILABS_DBUS_TIMER4_CC0(0x0, 0x1)
1474 #define TIMER4_CC0_PB0 SILABS_DBUS_TIMER4_CC0(0x1, 0x0)
1475 #define TIMER4_CC0_PB1 SILABS_DBUS_TIMER4_CC0(0x1, 0x1)
1476 #define TIMER4_CC0_PB2 SILABS_DBUS_TIMER4_CC0(0x1, 0x2)
1477 #define TIMER4_CC0_PB3 SILABS_DBUS_TIMER4_CC0(0x1, 0x3)
1478 #define TIMER4_CC0_PB4 SILABS_DBUS_TIMER4_CC0(0x1, 0x4)
1480 #define TIMER4_CC1_PA1 SILABS_DBUS_TIMER4_CC1(0x0, 0x1)
1488 #define TIMER4_CC1_PB0 SILABS_DBUS_TIMER4_CC1(0x1, 0x0)
1489 #define TIMER4_CC1_PB1 SILABS_DBUS_TIMER4_CC1(0x1, 0x1)
1490 #define TIMER4_CC1_PB2 SILABS_DBUS_TIMER4_CC1(0x1, 0x2)
1491 #define TIMER4_CC1_PB3 SILABS_DBUS_TIMER4_CC1(0x1, 0x3)
1492 #define TIMER4_CC1_PB4 SILABS_DBUS_TIMER4_CC1(0x1, 0x4)
1494 #define TIMER4_CC2_PA1 SILABS_DBUS_TIMER4_CC2(0x0, 0x1)
1502 #define TIMER4_CC2_PB0 SILABS_DBUS_TIMER4_CC2(0x1, 0x0)
1503 #define TIMER4_CC2_PB1 SILABS_DBUS_TIMER4_CC2(0x1, 0x1)
1504 #define TIMER4_CC2_PB2 SILABS_DBUS_TIMER4_CC2(0x1, 0x2)
1505 #define TIMER4_CC2_PB3 SILABS_DBUS_TIMER4_CC2(0x1, 0x3)
1506 #define TIMER4_CC2_PB4 SILABS_DBUS_TIMER4_CC2(0x1, 0x4)
1508 #define TIMER4_CDTI0_PA1 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x1)
1516 #define TIMER4_CDTI0_PB0 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x0)
1517 #define TIMER4_CDTI0_PB1 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x1)
1518 #define TIMER4_CDTI0_PB2 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x2)
1519 #define TIMER4_CDTI0_PB3 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x3)
1520 #define TIMER4_CDTI0_PB4 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x4)
1522 #define TIMER4_CDTI1_PA1 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x1)
1530 #define TIMER4_CDTI1_PB0 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x0)
1531 #define TIMER4_CDTI1_PB1 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x1)
1532 #define TIMER4_CDTI1_PB2 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x2)
1533 #define TIMER4_CDTI1_PB3 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x3)
1534 #define TIMER4_CDTI1_PB4 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x4)
1536 #define TIMER4_CDTI2_PA1 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x1)
1544 #define TIMER4_CDTI2_PB0 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x0)
1545 #define TIMER4_CDTI2_PB1 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x1)
1546 #define TIMER4_CDTI2_PB2 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x2)
1547 #define TIMER4_CDTI2_PB3 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x3)
1548 #define TIMER4_CDTI2_PB4 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x4)
1551 #define USART0_CS_PA1 SILABS_DBUS_USART0_CS(0x0, 0x1)
1559 #define USART0_CS_PB0 SILABS_DBUS_USART0_CS(0x1, 0x0)
1560 #define USART0_CS_PB1 SILABS_DBUS_USART0_CS(0x1, 0x1)
1561 #define USART0_CS_PB2 SILABS_DBUS_USART0_CS(0x1, 0x2)
1562 #define USART0_CS_PB3 SILABS_DBUS_USART0_CS(0x1, 0x3)
1563 #define USART0_CS_PB4 SILABS_DBUS_USART0_CS(0x1, 0x4)
1565 #define USART0_CS_PC1 SILABS_DBUS_USART0_CS(0x2, 0x1)
1573 #define USART0_CS_PD1 SILABS_DBUS_USART0_CS(0x3, 0x1)
1577 #define USART0_RTS_PA1 SILABS_DBUS_USART0_RTS(0x0, 0x1)
1585 #define USART0_RTS_PB0 SILABS_DBUS_USART0_RTS(0x1, 0x0)
1586 #define USART0_RTS_PB1 SILABS_DBUS_USART0_RTS(0x1, 0x1)
1587 #define USART0_RTS_PB2 SILABS_DBUS_USART0_RTS(0x1, 0x2)
1588 #define USART0_RTS_PB3 SILABS_DBUS_USART0_RTS(0x1, 0x3)
1589 #define USART0_RTS_PB4 SILABS_DBUS_USART0_RTS(0x1, 0x4)
1591 #define USART0_RTS_PC1 SILABS_DBUS_USART0_RTS(0x2, 0x1)
1599 #define USART0_RTS_PD1 SILABS_DBUS_USART0_RTS(0x3, 0x1)
1603 #define USART0_RX_PA1 SILABS_DBUS_USART0_RX(0x0, 0x1)
1611 #define USART0_RX_PB0 SILABS_DBUS_USART0_RX(0x1, 0x0)
1612 #define USART0_RX_PB1 SILABS_DBUS_USART0_RX(0x1, 0x1)
1613 #define USART0_RX_PB2 SILABS_DBUS_USART0_RX(0x1, 0x2)
1614 #define USART0_RX_PB3 SILABS_DBUS_USART0_RX(0x1, 0x3)
1615 #define USART0_RX_PB4 SILABS_DBUS_USART0_RX(0x1, 0x4)
1617 #define USART0_RX_PC1 SILABS_DBUS_USART0_RX(0x2, 0x1)
1625 #define USART0_RX_PD1 SILABS_DBUS_USART0_RX(0x3, 0x1)
1629 #define USART0_CLK_PA1 SILABS_DBUS_USART0_CLK(0x0, 0x1)
1637 #define USART0_CLK_PB0 SILABS_DBUS_USART0_CLK(0x1, 0x0)
1638 #define USART0_CLK_PB1 SILABS_DBUS_USART0_CLK(0x1, 0x1)
1639 #define USART0_CLK_PB2 SILABS_DBUS_USART0_CLK(0x1, 0x2)
1640 #define USART0_CLK_PB3 SILABS_DBUS_USART0_CLK(0x1, 0x3)
1641 #define USART0_CLK_PB4 SILABS_DBUS_USART0_CLK(0x1, 0x4)
1643 #define USART0_CLK_PC1 SILABS_DBUS_USART0_CLK(0x2, 0x1)
1651 #define USART0_CLK_PD1 SILABS_DBUS_USART0_CLK(0x3, 0x1)
1655 #define USART0_TX_PA1 SILABS_DBUS_USART0_TX(0x0, 0x1)
1663 #define USART0_TX_PB0 SILABS_DBUS_USART0_TX(0x1, 0x0)
1664 #define USART0_TX_PB1 SILABS_DBUS_USART0_TX(0x1, 0x1)
1665 #define USART0_TX_PB2 SILABS_DBUS_USART0_TX(0x1, 0x2)
1666 #define USART0_TX_PB3 SILABS_DBUS_USART0_TX(0x1, 0x3)
1667 #define USART0_TX_PB4 SILABS_DBUS_USART0_TX(0x1, 0x4)
1669 #define USART0_TX_PC1 SILABS_DBUS_USART0_TX(0x2, 0x1)
1677 #define USART0_TX_PD1 SILABS_DBUS_USART0_TX(0x3, 0x1)
1681 #define USART0_CTS_PA1 SILABS_DBUS_USART0_CTS(0x0, 0x1)
1689 #define USART0_CTS_PB0 SILABS_DBUS_USART0_CTS(0x1, 0x0)
1690 #define USART0_CTS_PB1 SILABS_DBUS_USART0_CTS(0x1, 0x1)
1691 #define USART0_CTS_PB2 SILABS_DBUS_USART0_CTS(0x1, 0x2)
1692 #define USART0_CTS_PB3 SILABS_DBUS_USART0_CTS(0x1, 0x3)
1693 #define USART0_CTS_PB4 SILABS_DBUS_USART0_CTS(0x1, 0x4)
1695 #define USART0_CTS_PC1 SILABS_DBUS_USART0_CTS(0x2, 0x1)
1703 #define USART0_CTS_PD1 SILABS_DBUS_USART0_CTS(0x3, 0x1)
1708 #define USART1_CS_PA1 SILABS_DBUS_USART1_CS(0x0, 0x1)
1716 #define USART1_CS_PB0 SILABS_DBUS_USART1_CS(0x1, 0x0)
1717 #define USART1_CS_PB1 SILABS_DBUS_USART1_CS(0x1, 0x1)
1718 #define USART1_CS_PB2 SILABS_DBUS_USART1_CS(0x1, 0x2)
1719 #define USART1_CS_PB3 SILABS_DBUS_USART1_CS(0x1, 0x3)
1720 #define USART1_CS_PB4 SILABS_DBUS_USART1_CS(0x1, 0x4)
1722 #define USART1_RTS_PA1 SILABS_DBUS_USART1_RTS(0x0, 0x1)
1730 #define USART1_RTS_PB0 SILABS_DBUS_USART1_RTS(0x1, 0x0)
1731 #define USART1_RTS_PB1 SILABS_DBUS_USART1_RTS(0x1, 0x1)
1732 #define USART1_RTS_PB2 SILABS_DBUS_USART1_RTS(0x1, 0x2)
1733 #define USART1_RTS_PB3 SILABS_DBUS_USART1_RTS(0x1, 0x3)
1734 #define USART1_RTS_PB4 SILABS_DBUS_USART1_RTS(0x1, 0x4)
1736 #define USART1_RX_PA1 SILABS_DBUS_USART1_RX(0x0, 0x1)
1744 #define USART1_RX_PB0 SILABS_DBUS_USART1_RX(0x1, 0x0)
1745 #define USART1_RX_PB1 SILABS_DBUS_USART1_RX(0x1, 0x1)
1746 #define USART1_RX_PB2 SILABS_DBUS_USART1_RX(0x1, 0x2)
1747 #define USART1_RX_PB3 SILABS_DBUS_USART1_RX(0x1, 0x3)
1748 #define USART1_RX_PB4 SILABS_DBUS_USART1_RX(0x1, 0x4)
1750 #define USART1_CLK_PA1 SILABS_DBUS_USART1_CLK(0x0, 0x1)
1758 #define USART1_CLK_PB0 SILABS_DBUS_USART1_CLK(0x1, 0x0)
1759 #define USART1_CLK_PB1 SILABS_DBUS_USART1_CLK(0x1, 0x1)
1760 #define USART1_CLK_PB2 SILABS_DBUS_USART1_CLK(0x1, 0x2)
1761 #define USART1_CLK_PB3 SILABS_DBUS_USART1_CLK(0x1, 0x3)
1762 #define USART1_CLK_PB4 SILABS_DBUS_USART1_CLK(0x1, 0x4)
1764 #define USART1_TX_PA1 SILABS_DBUS_USART1_TX(0x0, 0x1)
1772 #define USART1_TX_PB0 SILABS_DBUS_USART1_TX(0x1, 0x0)
1773 #define USART1_TX_PB1 SILABS_DBUS_USART1_TX(0x1, 0x1)
1774 #define USART1_TX_PB2 SILABS_DBUS_USART1_TX(0x1, 0x2)
1775 #define USART1_TX_PB3 SILABS_DBUS_USART1_TX(0x1, 0x3)
1776 #define USART1_TX_PB4 SILABS_DBUS_USART1_TX(0x1, 0x4)
1778 #define USART1_CTS_PA1 SILABS_DBUS_USART1_CTS(0x0, 0x1)
1786 #define USART1_CTS_PB0 SILABS_DBUS_USART1_CTS(0x1, 0x0)
1787 #define USART1_CTS_PB1 SILABS_DBUS_USART1_CTS(0x1, 0x1)
1788 #define USART1_CTS_PB2 SILABS_DBUS_USART1_CTS(0x1, 0x2)
1789 #define USART1_CTS_PB3 SILABS_DBUS_USART1_CTS(0x1, 0x3)
1790 #define USART1_CTS_PB4 SILABS_DBUS_USART1_CTS(0x1, 0x4)