Lines Matching +full:4 +full:- +full:pin

2  * Copyright (c) 2021-2023 IoT.bzh
4  * SPDX-License-Identifier: Apache-2.0
13  * Each IPSR bank can hold 8 cellules of 4 bits coded function.
17  * @param func the 4 bits encoded alternate function.
20  * Function shift   [ 4 : 8 ]
25 #define IPSR(bank, shift, func) (((bank) << 10U) | ((shift) << 4U) | (func))
27 /* Arbitrary number to encode non capable gpio pin */
31  * @brief Utility macro to encode a GPIO capable pin
34  * @param pin the pin within the GPIO bank (0..31)
36 #define RCAR_GP_PIN(bank, pin)     (((bank) * 32U) + (pin))  argument
39  * @brief Utility macro to encode a non capable GPIO pin
41  * @param pin the encoded pin number
43 #define RCAR_NOGP_PIN(pin)         (PIN_NOGPSR_START + pin)  argument
47  * Each base address has 4 IPSR banks.
68 #define IP0SR4(shift, func) IPnSR(0, 4, shift, func)
69 #define IP1SR4(shift, func) IPnSR(1, 4, shift, func)
70 #define IP2SR4(shift, func) IPnSR(2, 4, shift, func)
71 #define IP3SR4(shift, func) IPnSR(3, 4, shift, func)
86  * @brief Macro to define a dummy IPSR flag for a pin
88  * This macro is used to define a dummy IPSR flag for a pin in the R-Car PFC