Lines Matching refs:CCIPR1_REG
56 #define CCIPR1_REG 0xE0 macro
68 #define USART1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 0, CCIPR1_REG)
69 #define USART2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 2, CCIPR1_REG)
70 #define USART3_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 4, CCIPR1_REG)
71 #define UART4_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 6, CCIPR1_REG)
72 #define UART5_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 8, CCIPR1_REG)
73 #define I2C1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 10, CCIPR1_REG)
74 #define I2C2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 12, CCIPR1_REG)
75 #define I2C4_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 14, CCIPR1_REG)
76 #define SPI2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 16, CCIPR1_REG)
77 #define LPTIM2_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 18, CCIPR1_REG)
78 #define SPI1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 20, CCIPR1_REG)
79 #define SYSTICK_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 22, CCIPR1_REG)
80 #define FDCAN1_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 24, CCIPR1_REG)
81 #define ICKLK_SEL(val) STM32_DT_CLOCK_SELECT((val), 3, 26, CCIPR1_REG)
82 #define TIMIC_SEL(val) STM32_DT_CLOCK_SELECT((val), 7, 29, CCIPR1_REG)