Lines Matching +full:- +full:u

4  * SPDX-License-Identifier: Apache-2.0
10 #include "gd32-clocks-common.h"
29 #define GD32_CLOCK_DMA0     GD32_CLOCK_CONFIG(AHBEN, 0U)
30 #define GD32_CLOCK_DMA1     GD32_CLOCK_CONFIG(AHBEN, 1U)
31 #define GD32_CLOCK_SRAMSP   GD32_CLOCK_CONFIG(AHBEN, 2U)
32 #define GD32_CLOCK_DMAMUX   GD32_CLOCK_CONFIG(AHBEN, 3U)
33 #define GD32_CLOCK_FMCSP    GD32_CLOCK_CONFIG(AHBEN, 4U)
34 #define GD32_CLOCK_CRC      GD32_CLOCK_CONFIG(AHBEN, 6U)
35 #define GD32_CLOCK_MFCOM    GD32_CLOCK_CONFIG(AHBEN, 14U)
36 #define GD32_CLOCK_GPIOA    GD32_CLOCK_CONFIG(AHBEN, 17U)
37 #define GD32_CLOCK_GPIOB    GD32_CLOCK_CONFIG(AHBEN, 18U)
38 #define GD32_CLOCK_GPIOC    GD32_CLOCK_CONFIG(AHBEN, 19U)
39 #define GD32_CLOCK_GPIOD    GD32_CLOCK_CONFIG(AHBEN, 20U)
40 #define GD32_CLOCK_GPIOE    GD32_CLOCK_CONFIG(AHBEN, 21U)
41 #define GD32_CLOCK_GPIOF    GD32_CLOCK_CONFIG(AHBEN, 22U)
44 #define GD32_CLOCK_TIMER1     GD32_CLOCK_CONFIG(APB1EN, 0U)
45 #define GD32_CLOCK_TIMER5     GD32_CLOCK_CONFIG(APB1EN, 4U)
46 #define GD32_CLOCK_TIMER6     GD32_CLOCK_CONFIG(APB1EN, 5U)
47 #define GD32_CLOCK_WWDGT      GD32_CLOCK_CONFIG(APB1EN, 11U)
48 #define GD32_CLOCK_SPI1       GD32_CLOCK_CONFIG(APB1EN, 14U)
49 #define GD32_CLOCK_USART1     GD32_CLOCK_CONFIG(APB1EN, 17U)
50 #define GD32_CLOCK_USART2     GD32_CLOCK_CONFIG(APB1EN, 18U)
51 #define GD32_CLOCK_I2C0       GD32_CLOCK_CONFIG(APB1EN, 21U)
52 #define GD32_CLOCK_I2C1       GD32_CLOCK_CONFIG(APB1EN, 22U)
53 #define GD32_CLOCK_BKP        GD32_CLOCK_CONFIG(APB1EN, 26U)
54 #define GD32_CLOCK_PMU        GD32_CLOCK_CONFIG(APB1EN, 28U)
55 #define GD32_CLOCK_DAC        GD32_CLOCK_CONFIG(APB1EN, 29U)
58 #define GD32_CLOCK_SYSCFG     GD32_CLOCK_CONFIG(APB2EN, 0U)
59 #define GD32_CLOCK_CMP        GD32_CLOCK_CONFIG(APB2EN, 1U)
60 #define GD32_CLOCK_ADC0       GD32_CLOCK_CONFIG(APB2EN, 9U)
61 #define GD32_CLOCK_ADC1       GD32_CLOCK_CONFIG(APB2EN, 10U)
62 #define GD32_CLOCK_TIMER0     GD32_CLOCK_CONFIG(APB2EN, 11U)
63 #define GD32_CLOCK_SPI0       GD32_CLOCK_CONFIG(APB2EN, 12U)
64 #define GD32_CLOCK_TIMER7     GD32_CLOCK_CONFIG(APB2EN, 13U)
65 #define GD32_CLOCK_USART0     GD32_CLOCK_CONFIG(APB2EN, 14U)
66 #define GD32_CLOCK_TIMER19    GD32_CLOCK_CONFIG(APB2EN, 20U)
67 #define GD32_CLOCK_TIMER20    GD32_CLOCK_CONFIG(APB2EN, 21U)
68 #define GD32_CLOCK_TRIGSEL    GD32_CLOCK_CONFIG(APB2EN, 29U)
69 #define GD32_CLOCK_CAN0       GD32_CLOCK_CONFIG(APB2EN, 30U)
70 #define GD32_CLOCK_CAN1       GD32_CLOCK_CONFIG(APB2EN, 31U)