Lines Matching defs:sdhc_host_caps

163 struct sdhc_host_caps {  struct
164 	unsigned int timeout_clk_freq: 5;		/**< Timeout clock frequency */
165 	unsigned int _rsvd_6: 1;			/**< Reserved */
166 	unsigned int timeout_clk_unit: 1;		/**< Timeout clock unit */
167 	unsigned int sd_base_clk: 8;			/**< SD base clock frequency */
168 	unsigned int max_blk_len: 2;			/**< Max block length */
169 	unsigned int bus_8_bit_support: 1;		/**< 8-bit Support for embedded device */
170 	unsigned int bus_4_bit_support: 1;		/**< 4 bit bus support */
171 	unsigned int adma_2_support: 1;			/**< ADMA2 support */
172 	unsigned int _rsvd_20: 1;			/**< Reserved */
173 	unsigned int high_spd_support: 1;		/**< High speed support */
174 	unsigned int sdma_support: 1;			/**< SDMA support */
175 	unsigned int suspend_res_support: 1;		/**< Suspend/Resume support */
176 	unsigned int vol_330_support: 1;		/**< Voltage support 3.3V */
177 	unsigned int vol_300_support: 1;		/**< Voltage support 3.0V */
178 	unsigned int vol_180_support: 1;		/**< Voltage support 1.8V */
179 	unsigned int address_64_bit_support_v4: 1;	/**< 64-bit system address support for V4 */
180 	unsigned int address_64_bit_support_v3: 1;	/**< 64-bit system address support for V3 */
181 	unsigned int sdio_async_interrupt_support: 1;	/**< Asynchronous interrupt support */
182 	unsigned int slot_type: 2;			/**< Slot type */
183 	unsigned int sdr50_support: 1;			/**< SDR50 support */
184 	unsigned int sdr104_support: 1;			/**< SDR104 support */
185 	unsigned int ddr50_support: 1;			/**< DDR50 support */
186 	unsigned int uhs_2_support: 1;			/**< UHS-II support */
187 	unsigned int drv_type_a_support: 1;		/**< Driver type A support */
188 	unsigned int drv_type_c_support: 1;		/**< Driver type C support */
189 	unsigned int drv_type_d_support: 1;		/**< Driver type D support */
190 	unsigned int _rsvd_39: 1;			/**< Reserved */
191 	unsigned int retune_timer_count: 4;		/**< Timer count for re-tuning */
192 	unsigned int sdr50_needs_tuning: 1;		/**< Use tuning for SDR50 */
193 	unsigned int retuning_mode: 2;			/**< Re-tuning mode */
194 	unsigned int clk_multiplier: 8;			/**< Clock multiplier */
195 	unsigned int _rsvd_56: 3;			/**< Reserved */
196 	unsigned int adma3_support: 1;			/**< ADMA3 support */
197 	unsigned int vdd2_180_support: 1;		/**< 1.8V VDD2 support */
198 	unsigned int _rsvd_61: 3;			/**< Reserved */
199 	unsigned int hs200_support: 1;			/**< HS200 support */
200 	unsigned int hs400_support: 1;			/**< HS400 support */