Lines Matching +full:0 +full:- +full:32
4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
16 #define VIM_BASE_ADDR DT_REG_ADDR(DT_INST(0, ti_vim))
18 #define VIM_MAX_IRQ_PER_GROUP (32)
26 #define VIM_PID (VIM_BASE_ADDR + 0x0000)
27 #define VIM_INFO (VIM_BASE_ADDR + 0x0004)
28 #define VIM_PRIIRQ (VIM_BASE_ADDR + 0x0008)
29 #define VIM_PRIFIQ (VIM_BASE_ADDR + 0x000C)
30 #define VIM_IRQGSTS (VIM_BASE_ADDR + 0x0010)
31 #define VIM_FIQGSTS (VIM_BASE_ADDR + 0x0014)
32 #define VIM_IRQVEC (VIM_BASE_ADDR + 0x0018)
33 #define VIM_FIQVEC (VIM_BASE_ADDR + 0x001C)
34 #define VIM_ACTIRQ (VIM_BASE_ADDR + 0x0020)
35 #define VIM_ACTFIQ (VIM_BASE_ADDR + 0x0024)
36 #define VIM_DEDVEC (VIM_BASE_ADDR + 0x0030)
38 #define VIM_RAW(n) (VIM_BASE_ADDR + (0x400) + ((n) * 0x20))
39 #define VIM_STS(n) (VIM_BASE_ADDR + (0x404) + ((n) * 0x20))
40 #define VIM_INTR_EN_SET(n) (VIM_BASE_ADDR + (0x408) + ((n) * 0x20))
41 #define VIM_INTR_EN_CLR(n) (VIM_BASE_ADDR + (0x40c) + ((n) * 0x20))
42 #define VIM_IRQSTS(n) (VIM_BASE_ADDR + (0x410) + ((n) * 0x20))
43 #define VIM_FIQSTS(n) (VIM_BASE_ADDR + (0x414) + ((n) * 0x20))
44 #define VIM_INTMAP(n) (VIM_BASE_ADDR + (0x418) + ((n) * 0x20))
45 #define VIM_INTTYPE(n) (VIM_BASE_ADDR + (0x41c) + ((n) * 0x20))
46 #define VIM_PRI_INT(n) (VIM_BASE_ADDR + (0x1000) + ((n) * 0x4))
47 #define VIM_VEC_INT(n) (VIM_BASE_ADDR + (0x2000) + ((n) * 0x4))
51 #define VIM_GRP_RAW_STS_MASK (BIT_MASK(32))
52 #define VIM_GRP_RAW_STS_SHIFT (0x00000000U)
53 #define VIM_GRP_RAW_STS_RESETVAL (0x00000000U)
54 #define VIM_GRP_RAW_STS_MAX (BIT_MASK(32))
56 #define VIM_GRP_RAW_RESETVAL (0x00000000U)
60 #define VIM_GRP_STS_MSK_MASK (BIT_MASK(32))
61 #define VIM_GRP_STS_MSK_SHIFT (0x00000000U)
62 #define VIM_GRP_STS_MSK_RESETVAL (0x00000000U)
63 #define VIM_GRP_STS_MSK_MAX (BIT_MASK(32))
65 #define VIM_GRP_STS_RESETVAL (0x00000000U)
69 #define VIM_GRP_INTR_EN_SET_MSK_MASK (BIT_MASK(32))
70 #define VIM_GRP_INTR_EN_SET_MSK_SHIFT (0x00000000U)
71 #define VIM_GRP_INTR_EN_SET_MSK_RESETVAL (0x00000000U)
72 #define VIM_GRP_INTR_EN_SET_MSK_MAX (BIT_MASK(32))
74 #define VIM_GRP_INTR_EN_SET_RESETVAL (0x00000000U)
78 #define VIM_GRP_INTR_EN_CLR_MSK_MASK (BIT_MASK(32))
79 #define VIM_GRP_INTR_EN_CLR_MSK_SHIFT (0x00000000U)
80 #define VIM_GRP_INTR_EN_CLR_MSK_RESETVAL (0x00000000U)
81 #define VIM_GRP_INTR_EN_CLR_MSK_MAX (BIT_MASK(32))
83 #define VIM_GRP_INTR_EN_CLR_RESETVAL (0x00000000U)
87 #define VIM_GRP_IRQSTS_MSK_MASK (BIT_MASK(32))
88 #define VIM_GRP_IRQSTS_MSK_SHIFT (0x00000000U)
89 #define VIM_GRP_IRQSTS_MSK_RESETVAL (0x00000000U)
90 #define VIM_GRP_IRQSTS_MSK_MAX (BIT_MASK(32))
92 #define VIM_GRP_IRQSTS_RESETVAL (0x00000000U)
96 #define VIM_GRP_FIQSTS_MSK_MASK (BIT_MASK(32))
97 #define VIM_GRP_FIQSTS_MSK_SHIFT (0x00000000U)
98 #define VIM_GRP_FIQSTS_MSK_RESETVAL (0x00000000U)
99 #define VIM_GRP_FIQSTS_MSK_MAX (BIT_MASK(32))
101 #define VIM_GRP_FIQSTS_RESETVAL (0x00000000U)
105 #define VIM_GRP_INTMAP_MSK_MASK (BIT_MASK(32))
106 #define VIM_GRP_INTMAP_MSK_SHIFT (0x00000000U)
107 #define VIM_GRP_INTMAP_MSK_RESETVAL (0x00000000U)
108 #define VIM_GRP_INTMAP_MSK_MAX (BIT_MASK(32))
110 #define VIM_GRP_INTMAP_RESETVAL (0x00000000U)
114 #define VIM_GRP_INTTYPE_MSK_MASK (BIT_MASK(32))
115 #define VIM_GRP_INTTYPE_MSK_SHIFT (0x00000000U)
116 #define VIM_GRP_INTTYPE_MSK_RESETVAL (0x00000000U)
117 #define VIM_GRP_INTTYPE_MSK_MAX (BIT_MASK(32))
119 #define VIM_GRP_INTTYPE_RESETVAL (0x00000000U)
124 #define VIM_PRI_INT_VAL_SHIFT (0x00000000U)
132 #define VIM_VEC_INT_VAL_MASK (0xFFFFFFFCU)
133 #define VIM_VEC_INT_VAL_SHIFT (0x00000002U)
134 #define VIM_VEC_INT_VAL_RESETVAL (0x00000000U)
137 #define VIM_VEC_INT_RESETVAL (0x00000000U)
142 #define VIM_INFO_INTERRUPTS_SHIFT (0x00000000U)
143 #define VIM_INFO_INTERRUPTS_RESETVAL (0x00000400U)
146 #define VIM_INFO_RESETVAL (0x00000400U)
150 #define VIM_PRIIRQ_VALID_MASK (0x80000000U)
152 #define VIM_PRIIRQ_VALID_RESETVAL (0x00000000U)
153 #define VIM_PRIIRQ_VALID_MAX (0x00000001U)
155 #define VIM_PRIIRQ_VALID_VAL_TRUE (0x1U)
156 #define VIM_PRIIRQ_VALID_VAL_FALSE (0x0U)
158 #define VIM_PRIIRQ_PRI_MASK (0x000F0000U)
159 #define VIM_PRIIRQ_PRI_SHIFT (0x00000010U)
160 #define VIM_PRIIRQ_PRI_RESETVAL (0x00000000U)
164 #define VIM_PRIIRQ_NUM_SHIFT (0x00000000U)
165 #define VIM_PRIIRQ_NUM_RESETVAL (0x00000000U)
168 #define VIM_PRIIRQ_RESETVAL (0x00000000U)
172 #define VIM_PRIFIQ_VALID_MASK (0x80000000U)
174 #define VIM_PRIFIQ_VALID_RESETVAL (0x00000000U)
175 #define VIM_PRIFIQ_VALID_MAX (0x00000001U)
177 #define VIM_PRIFIQ_VALID_VAL_TRUE (0x1U)
178 #define VIM_PRIFIQ_VALID_VAL_FALSE (0x0U)
180 #define VIM_PRIFIQ_PRI_MASK (0x000F0000U)
181 #define VIM_PRIFIQ_PRI_SHIFT (0x00000010U)
182 #define VIM_PRIFIQ_PRI_RESETVAL (0x00000000U)
186 #define VIM_PRIFIQ_NUM_SHIFT (0x00000000U)
187 #define VIM_PRIFIQ_NUM_RESETVAL (0x00000000U)
190 #define VIM_PRIFIQ_RESETVAL (0x00000000U)
194 #define VIM_IRQGSTS_STS_MASK (BIT_MASK(32))
195 #define VIM_IRQGSTS_STS_SHIFT (0x00000000U)
196 #define VIM_IRQGSTS_STS_RESETVAL (0x00000000U)
197 #define VIM_IRQGSTS_STS_MAX (BIT_MASK(32))
199 #define VIM_IRQGSTS_RESETVAL (0x00000000U)
203 #define VIM_FIQGSTS_STS_MASK (BIT_MASK(32))
204 #define VIM_FIQGSTS_STS_SHIFT (0x00000000U)
205 #define VIM_FIQGSTS_STS_RESETVAL (0x00000000U)
206 #define VIM_FIQGSTS_STS_MAX (BIT_MASK(32))
208 #define VIM_FIQGSTS_RESETVAL (0x00000000U)
212 #define VIM_IRQVEC_ADDR_MASK (0xFFFFFFFCU)
213 #define VIM_IRQVEC_ADDR_SHIFT (0x00000002U)
214 #define VIM_IRQVEC_ADDR_RESETVAL (0x00000000U)
217 #define VIM_IRQVEC_RESETVAL (0x00000000U)
221 #define VIM_FIQVEC_ADDR_MASK (0xFFFFFFFCU)
222 #define VIM_FIQVEC_ADDR_SHIFT (0x00000002U)
223 #define VIM_FIQVEC_ADDR_RESETVAL (0x00000000U)
226 #define VIM_FIQVEC_RESETVAL (0x00000000U)
230 #define VIM_ACTIRQ_VALID_MASK (0x80000000U)
232 #define VIM_ACTIRQ_VALID_RESETVAL (0x00000000U)
233 #define VIM_ACTIRQ_VALID_MAX (0x00000001U)
235 #define VIM_ACTIRQ_VALID_VAL_TRUE (0x1U)
236 #define VIM_ACTIRQ_VALID_VAL_FALSE (0x0U)
238 #define VIM_ACTIRQ_PRI_MASK (0x000F0000U)
239 #define VIM_ACTIRQ_PRI_SHIFT (0x00000010U)
240 #define VIM_ACTIRQ_PRI_RESETVAL (0x00000000U)
244 #define VIM_ACTIRQ_NUM_SHIFT (0x00000000U)
245 #define VIM_ACTIRQ_NUM_RESETVAL (0x00000000U)
248 #define VIM_ACTIRQ_RESETVAL (0x00000000U)
252 #define VIM_ACTFIQ_VALID_MASK (0x80000000U)
254 #define VIM_ACTFIQ_VALID_RESETVAL (0x00000000U)
255 #define VIM_ACTFIQ_VALID_MAX (0x00000001U)
257 #define VIM_ACTFIQ_VALID_VAL_TRUE (0x1U)
258 #define VIM_ACTFIQ_VALID_VAL_FALSE (0x0U)
260 #define VIM_ACTFIQ_PRI_MASK (0x000F0000U)
261 #define VIM_ACTFIQ_PRI_SHIFT (0x00000010U)
262 #define VIM_ACTFIQ_PRI_RESETVAL (0x00000000U)
266 #define VIM_ACTFIQ_NUM_SHIFT (0x00000000U)
267 #define VIM_ACTFIQ_NUM_RESETVAL (0x00000000U)
270 #define VIM_ACTFIQ_RESETVAL (0x00000000U)
274 #define VIM_DEDVEC_ADDR_MASK (0xFFFFFFFCU)
275 #define VIM_DEDVEC_ADDR_SHIFT (0x00000002U)
276 #define VIM_DEDVEC_ADDR_RESETVAL (0x00000000U)
279 #define VIM_DEDVEC_RESETVAL (0x00000000U)
293 * @brief Signal end-of-interrupt.
332 * @retval 0 If interrupt is disabled.