Lines Matching +full:1 +full:- +full:a

4  * SPDX-License-Identifier: Apache-2.0
14  * Interrupt allocation flags - These flags can be used to specify
18 /* Keep the LEVELx values as they are here; they match up with (1<<level) */
19 #define ESP_INTR_FLAG_LEVEL1		(1<<1)	/* Accept a Level 1 int vector, lowest priority */
20 #define ESP_INTR_FLAG_LEVEL2		(1<<2)	/* Accept a Level 2 int vector */
21 #define ESP_INTR_FLAG_LEVEL3		(1<<3)	/* Accept a Level 3 int vector */
22 #define ESP_INTR_FLAG_LEVEL4		(1<<4)	/* Accept a Level 4 int vector */
23 #define ESP_INTR_FLAG_LEVEL5		(1<<5)	/* Accept a Level 5 int vector */
24 #define ESP_INTR_FLAG_LEVEL6		(1<<6)	/* Accept a Level 6 int vector */
25 #define ESP_INTR_FLAG_NMI		(1<<7)	/* Accept a Level 7 int vector, highest priority */
26 #define ESP_INTR_FLAG_SHARED		(1<<8)	/* Interrupt can be shared between ISRs */
27 #define ESP_INTR_FLAG_EDGE		(1<<9)	/* Edge-triggered interrupt */
28 #define ESP_INTR_FLAG_IRAM		(1<<10)	/* ISR can be called if cache is disabled */
29 #define ESP_INTR_FLAG_INTRDISABLED	(1<<11)	/* Return with this interrupt disabled */
47 	((priority) > 0 ? ((1 << (priority)) & ESP_INTR_FLAG_LEVELMASK) : 0)
69  * a handle for the interrupt as well.
74  *               is 0, it will default to allocating a non-shared interrupt of level
75  *               1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
76  *               interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
80  * @param ret_handle Pointer to a struct intr_handle_data_t pointer to store a handle that can
84  * @return -EINVAL if the combination of arguments is invalid.
85  *         -ENODEV No free interrupt found with the specified flags
99  * @return -EINVAL if the combination of arguments is invalid.
108  * @return -EINVAL if the combination of arguments is invalid.
116  * @param status_mask_number the status mask can be 0 or 1