Lines Matching +full:dma +full:- +full:offset

4  * SPDX-License-Identifier: Apache-2.0
10 /* @brief linked_channel value to inform zephyr dma driver that
11  * DMA channel will be handled by HAL
15 /* @brief gives the first DMA channel : 0 or 1 in the register map
16  * when counting channels from 1 to N or from 0 to N-1
19 /* from DTS the dma stream id is in range 0..N-1 */
22 /* from DTS the dma stream id is in range 1..N */
26 /* typically on the stm32H7 series, DMA V1 with mux */
29 /* from DTS the dma stream id is in range 0..N-1 */
33 /* macro for dma slot (only for dma-v1 or dma-v2 types) */
58 /* macros for channel-config */
59 /* direction defined on bits 6-7 */
60 /* 0 -> MEM_TO_MEM, 1 -> MEM_TO_PERIPH, 2 -> PERIPH_TO_MEM */
66 /* periph data size defined on bits 11-12 */
67 /* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
71 /* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
74 /* priority increment offset defined on bit 15 */
76 /* priority defined on bits 16-17 as 0, 1, 2, 3 */
79 /* macro for features (only for dma-v1) */