Lines Matching +full:address +full:- +full:aligned

5  * SPDX-License-Identifier: Apache-2.0
48  * @brief Enable the d-cache
61  * @brief Disable the d-cache
74  * @brief Enable the i-cache
87  * @brief Disable the i-cache
100  * @brief Flush the d-cache
105  * @retval -ENOTSUP If not supported.
106  * @retval -errno Negative errno for other failures.
113 	return -ENOTSUP;
117  * @brief Flush the i-cache
122  * @retval -ENOTSUP If not supported.
123  * @retval -errno Negative errno for other failures.
130 	return -ENOTSUP;
134  * @brief Invalidate the d-cache
139  * @retval -ENOTSUP If not supported.
140  * @retval -errno Negative errno for other failures.
147 	return -ENOTSUP;
151  * @brief Invalidate the i-cache
156  * @retval -ENOTSUP If not supported.
157  * @retval -errno Negative errno for other failures.
164 	return -ENOTSUP;
168  * @brief Flush and Invalidate the d-cache
173  * @retval -ENOTSUP If not supported.
174  * @retval -errno Negative errno for other failures.
181 	return -ENOTSUP;
185  * @brief Flush and Invalidate the i-cache
190  * @retval -ENOTSUP If not supported.
191  * @retval -errno Negative errno for other failures.
198 	return -ENOTSUP;
202  * @brief Flush an address range in the d-cache
204  * Flush the specified address range of the data cache.
209  *       not a problem because writing back is a non-destructive process that
210  *       could be triggered by hardware at any time, so having an aligned
213  * @param addr Starting address to flush.
217  * @retval -ENOTSUP If not supported.
218  * @retval -errno Negative errno for other failures.
230 	return -ENOTSUP;
234  * @brief Flush an address range in the i-cache
236  * Flush the specified address range of the instruction cache.
241  *       not a problem because writing back is a non-destructive process that
242  *       could be triggered by hardware at any time, so having an aligned
245  * @param addr Starting address to flush.
249  * @retval -ENOTSUP If not supported.
250  * @retval -errno Negative errno for other failures.
260 	return -ENOTSUP;
264  * @brief Invalidate an address range in the d-cache
266  * Invalidate the specified address range of the data cache.
270  *       non-read-only data structures sharing the same line will be
272  *       data loss and/or corruption. When @p addr is not aligned to the cache
276  * @param addr Starting address to invalidate.
280  * @retval -ENOTSUP If not supported.
281  * @retval -errno Negative errno for other failures.
293 	return -ENOTSUP;
297  * @brief Invalidate an address range in the i-cache
299  * Invalidate the specified address range of the instruction cache.
303  *       non-read-only data structures sharing the same line will be
305  *       data loss and/or corruption. When @p addr is not aligned to the cache
309  * @param addr Starting address to invalidate.
313  * @retval -ENOTSUP If not supported.
314  * @retval -errno Negative errno for other failures.
324 	return -ENOTSUP;
328  * @brief Flush and Invalidate an address range in the d-cache
330  * Flush and Invalidate the specified address range of the data cache.
336  *       non-destructive process that could be triggered by hardware at any
337  *       time, so having an aligned @p addr or a padded @p size is not strictly
340  * @param addr Starting address to flush and invalidate.
344  * @retval -ENOTSUP If not supported.
345  * @retval -errno Negative errno for other failures.
357 	return -ENOTSUP;
361  * @brief Flush and Invalidate an address range in the i-cache
363  * Flush and Invalidate the specified address range of the instruction cache.
369  *       non-destructive process that could be triggered by hardware at any
370  *       time, so having an aligned @p addr or a padded @p size is not strictly
373  * @param addr Starting address to flush and invalidate.
377  * @retval -ENOTSUP If not supported.
378  * @retval -errno Negative errno for other failures.
388 	return -ENOTSUP;
393  * @brief Get the d-cache line size.
399  * - At run-time when @kconfig{CONFIG_DCACHE_LINE_SIZE_DETECT} is set.
400  * - At compile time using the value set in @kconfig{CONFIG_DCACHE_LINE_SIZE}.
401  * - At compile time using the `d-cache-line-size` CPU0 property of the DT.
402  * - 0 otherwise
404  * @retval size Size of the d-cache line.
405  * @retval 0 If the d-cache is not enabled.
420  * @brief Get the i-cache line size.
426  * - At run-time when @kconfig{CONFIG_ICACHE_LINE_SIZE_DETECT} is set.
427  * - At compile time using the value set in @kconfig{CONFIG_ICACHE_LINE_SIZE}.
428  * - At compile time using the `i-cache-line-size` CPU0 property of the DT.
429  * - 0 otherwise
431  * @retval size Size of the d-cache line.
432  * @retval 0 If the d-cache is not enabled.
470  * @brief Test if a pointer is in un-cached region.
475  * pointer is within the un-cached, incoherent area.
494  * @brief Return cached pointer to a RAM address
521  * @brief Return uncached pointer to a RAM address