Lines Matching +full:lock +full:- +full:regions

4  * SPDX-License-Identifier: Apache-2.0
12 #include <xtensa/config/core-isa.h>
93 	 * This contains the start address, the enable bit, and the lock bit.
110 			 * Lock bit for this entry.
116 			 * - This cannot be cleared until reset.
117 			 * - This entry can no longer be modified.
118 			 * - The start address of the next entry also
121 			uint32_t lock:1;  member
170 			 * cacheable vs non-cacheable, shareable vs non-shareable.
252 /* Read-Write access permission attributes */
264 /* Execution-allowed attributes */
300  * @brief Additional memory regions required by SoC.
302  * These memory regions will be setup by MPU initialization code at boot.
309  * @brief Number of SoC additional memory regions.
318  * This initializes the MPU hardware and setup the memory regions at boot.