Lines Matching +full:execution +full:- +full:memory

4  * SPDX-License-Identifier: Apache-2.0
12 #include <xtensa/config/core-isa.h>
18  * @defgroup xtensa_mpu_apis Xtensa Memory Protection Unit (MPU) APIs
27  * @name MPU memory region access rights.
37 /** Kernel mode execution only. */
40 /** User mode execution only. */
46 /** Kernel mode read and execution. */
52 /** Kernel mode read, write and execution. */
58 /** Kernel mode read, write. User mode read, write and execution. */
64 /** Kernel mode read, write and execution. User mode read and execution. */
70 /** Kernel and user modes read and execution. */
76 /** Kernel and user modes read, write and execution. */
116 			 * - This cannot be cleared until reset.
117 			 * - This entry can no longer be modified.
118 			 * - The start address of the next entry also
139 	 * This contains the memory type, access rights, and the segment number.
164 			 * Memory type associated with this MPU entry.
166 			 * This dictates the memory type from the start address of
169 			 * This affects how the hardware treats the memory, for example,
170 			 * cacheable vs non-cacheable, shareable vs non-shareable.
194  * @name Memory domain and partitions
252 /* Read-Write access permission attributes */
264 /* Execution-allowed attributes */
273  * Struct to describe a memory region [start, end).
276 	/** Start address (inclusive) of the memory region. */
280 	 * End address (exclusive) of the memory region.
282 	 * Use 0xFFFFFFFF for the end of memory.
286 	/** Access rights for the memory region. */
290 	 * Memory type for the region.
300  * @brief Additional memory regions required by SoC.
302  * These memory regions will be setup by MPU initialization code at boot.
309  * @brief Number of SoC additional memory regions.
318  * This initializes the MPU hardware and setup the memory regions at boot.