Lines Matching full:range

53 #define VTD_MTRR_FIX64K_00000_REG 0x120 /* Fixed-range MTRR for 64K_00000 */
54 #define VTD_MTRR_FIX16K_80000_REG 0x128 /* Fixed-range MTRR for 16K_80000 */
55 #define VTD_MTRR_FIX16K_A0000_REG 0x130 /* Fixed-range MTRR for 16K_A0000 */
56 #define VTD_MTRR_FIX4K_C0000_REG 0x138 /* Fixed-range MTRR for 4K_C0000 */
57 #define VTD_MTRR_FIX4K_C8000_REG 0x140 /* Fixed-range MTRR for 4K_C8000 */
58 #define VTD_MTRR_FIX4K_D0000_REG 0x148 /* Fixed-range MTRR for 4K_D0000 */
59 #define VTD_MTRR_FIX4K_D8000_REG 0x150 /* Fixed-range MTRR for 4K_D8000 */
60 #define VTD_MTRR_FIX4K_E0000_REG 0x158 /* Fixed-range MTRR for 4K_E0000 */
61 #define VTD_MTRR_FIX4K_E8000_REG 0x160 /* Fixed-range MTRR for 4K_E8000 */
62 #define VTD_MTRR_FIX4K_F0000_REG 0x168 /* Fixed-range MTRR for 4K_F0000 */
63 #define VTD_MTRR_FIX4K_F8000_REG 0x170 /* Fixed-range MTRR for 4K_F8000 */
64 #define VTD_MTRR_PHYSBASE0_REG	0x180 /* Variable-range MTRR Base0 */
65 #define VTD_MTRR_PHYSMASK0_REG	0x188 /* Variable-range MTRR Mask0 */
66 #define VTD_MTRR_PHYSBASE1_REG	0x190 /* Variable-range MTRR Base1 */
67 #define VTD_MTRR_PHYSMASK1_REG	0x198 /* Variable-range MTRR Mask1 */
68 #define VTD_MTRR_PHYSBASE2_REG	0x1A0 /* Variable-range MTRR Base2 */
69 #define VTD_MTRR_PHYSMASK2_REG	0x1A8 /* Variable-range MTRR Mask2 */
70 #define VTD_MTRR_PHYSBASE3_REG	0x1B0 /* Variable-range MTRR Base3 */
71 #define VTD_MTRR_PHYSMASK3_REG	0x1B8 /* Variable-range MTRR Mask3 */
72 #define VTD_MTRR_PHYSBASE4_REG	0x1C0 /* Variable-range MTRR Base4 */
73 #define VTD_MTRR_PHYSMASK4_REG	0x1C8 /* Variable-range MTRR Mask4 */
74 #define VTD_MTRR_PHYSBASE5_REG	0x1D0 /* Variable-range MTRR Base5 */
75 #define VTD_MTRR_PHYSMASK5_REG	0x1D8 /* Variable-range MTRR Mask5 */
76 #define VTD_MTRR_PHYSBASE6_REG	0x1E0 /* Variable-range MTRR Base6 */
77 #define VTD_MTRR_PHYSMASK6_REG	0x1E8 /* Variable-range MTRR Mask6 */
78 #define VTD_MTRR_PHYSBASE7_REG	0x1F0 /* Variable-range MTRR Base7 */
79 #define VTD_MTRR_PHYSMASK7_REG	0x1F8 /* Variable-range MTRR Mask7 */
80 #define VTD_MTRR_PHYSBASE8_REG	0x200 /* Variable-range MTRR Base8 */
81 #define VTD_MTRR_PHYSMASK8_REG	0x208 /* Variable-range MTRR Mask8 */
82 #define VTD_MTRR_PHYSBASE9_REG	0x210 /* Variable-range MTRR Base9 */
83 #define VTD_MTRR_PHYSMASK9_REG	0x218 /* Variable-range MTRR Mask9 */