Lines Matching full:variable
64 #define VTD_MTRR_PHYSBASE0_REG 0x180 /* Variable-range MTRR Base0 */
65 #define VTD_MTRR_PHYSMASK0_REG 0x188 /* Variable-range MTRR Mask0 */
66 #define VTD_MTRR_PHYSBASE1_REG 0x190 /* Variable-range MTRR Base1 */
67 #define VTD_MTRR_PHYSMASK1_REG 0x198 /* Variable-range MTRR Mask1 */
68 #define VTD_MTRR_PHYSBASE2_REG 0x1A0 /* Variable-range MTRR Base2 */
69 #define VTD_MTRR_PHYSMASK2_REG 0x1A8 /* Variable-range MTRR Mask2 */
70 #define VTD_MTRR_PHYSBASE3_REG 0x1B0 /* Variable-range MTRR Base3 */
71 #define VTD_MTRR_PHYSMASK3_REG 0x1B8 /* Variable-range MTRR Mask3 */
72 #define VTD_MTRR_PHYSBASE4_REG 0x1C0 /* Variable-range MTRR Base4 */
73 #define VTD_MTRR_PHYSMASK4_REG 0x1C8 /* Variable-range MTRR Mask4 */
74 #define VTD_MTRR_PHYSBASE5_REG 0x1D0 /* Variable-range MTRR Base5 */
75 #define VTD_MTRR_PHYSMASK5_REG 0x1D8 /* Variable-range MTRR Mask5 */
76 #define VTD_MTRR_PHYSBASE6_REG 0x1E0 /* Variable-range MTRR Base6 */
77 #define VTD_MTRR_PHYSMASK6_REG 0x1E8 /* Variable-range MTRR Mask6 */
78 #define VTD_MTRR_PHYSBASE7_REG 0x1F0 /* Variable-range MTRR Base7 */
79 #define VTD_MTRR_PHYSMASK7_REG 0x1F8 /* Variable-range MTRR Mask7 */
80 #define VTD_MTRR_PHYSBASE8_REG 0x200 /* Variable-range MTRR Base8 */
81 #define VTD_MTRR_PHYSMASK8_REG 0x208 /* Variable-range MTRR Mask8 */
82 #define VTD_MTRR_PHYSBASE9_REG 0x210 /* Variable-range MTRR Base9 */
83 #define VTD_MTRR_PHYSMASK9_REG 0x218 /* Variable-range MTRR Mask9 */