Lines Matching +full:8 +full:v
36 #define R_RISCV_TLS_DTPREL32 8
95 * "wordclass" from RISC-V specification
112 /** @brief Generate mask for immediate in B-type RISC-V instruction
120 (R_RISCV_IMM8_GET_BIT(imm8, 9) << 29) | (R_RISCV_IMM8_GET_BIT(imm8, 8) << 28) | \
124 (R_RISCV_IMM8_GET_BIT(imm8, 1) << 8) | (R_RISCV_IMM8_GET_BIT(imm8, 11) << 7))
126 /** @brief Generate mask for immediate in J-type RISC-V instruction
134 (R_RISCV_IMM8_GET_BIT(imm8, 9) << 29) | (R_RISCV_IMM8_GET_BIT(imm8, 8) << 28) | \
144 /** @brief Generate mask for immediate in S-type RISC-V instruction
151 (R_RISCV_IMM8_GET_BIT(imm8, 9) << 29) | (R_RISCV_IMM8_GET_BIT(imm8, 8) << 28) | \
155 (R_RISCV_IMM8_GET_BIT(imm8, 1) << 8) | (R_RISCV_IMM8_GET_BIT(imm8, 0) << 7))
157 /** @brief Generate mask for immediate in compressed J-type RISC-V instruction
165 (R_RISCV_IMM8_GET_BIT(imm8, 9) << 10) | (R_RISCV_IMM8_GET_BIT(imm8, 8) << 9) | \
166 (R_RISCV_IMM8_GET_BIT(imm8, 10) << 8) | (R_RISCV_IMM8_GET_BIT(imm8, 6) << 7) | \
171 /** @brief Generate mask for immediate in compressed B-type RISC-V instruction
178 ((R_RISCV_IMM8_GET_BIT(imm8, 8) << 12) | (R_RISCV_IMM8_GET_BIT(imm8, 4) << 11) | \
185 * @param operand Address of RISC-V instruction, B-type
192 * @param operand Address of RISC-V instruction, B-type
201 * @param operand Address of RISC-V instruction, J-type
208 * @param operand Address of RISC-V instruction, J-type
217 * @param operand Address of RISC-V instruction, S-type
224 * @param operand Address of RISC-V instruction, S-type
233 * @param operand Address of RISC-V instruction, compressed-J-type
240 * @param operand Address of RISC-V instruction, compressed-J-type
249 * @param operand Address of RISC-V instruction, compressed-B-type
256 * @param operand Address of RISC-V instruction, compressed-B-type
265 * @param operand Address of RISC-V instruction, U-type
272 * @param operand Address of RISC-V instruction, U-type
281 * @param operand Address of RISC-V instruction, I-type
288 * @param operand Address of RISC-V instruction, I-type