Lines Matching +full:5 +full:v

33 #define R_RISCV_JUMP_SLOT         5
95  * "wordclass" from RISC-V specification
112 /** @brief  Generate mask for immediate in B-type RISC-V instruction
122 	 (R_RISCV_IMM8_GET_BIT(imm8, 5) << 25) | (R_RISCV_IMM8_GET_BIT(imm8, 4) << 11) |           \
126 /** @brief  Generate mask for immediate in J-type RISC-V instruction
136 	 (R_RISCV_IMM8_GET_BIT(imm8, 5) << 25) | (R_RISCV_IMM8_GET_BIT(imm8, 4) << 24) |           \
144 /** @brief  Generate mask for immediate in S-type RISC-V instruction
153 	 (R_RISCV_IMM8_GET_BIT(imm8, 5) << 25) | (R_RISCV_IMM8_GET_BIT(imm8, 4) << 11) |           \
157 /** @brief  Generate mask for immediate in compressed J-type RISC-V instruction
167 	 (R_RISCV_IMM8_GET_BIT(imm8, 7) << 6) | (R_RISCV_IMM8_GET_BIT(imm8, 3) << 5) |             \
169 	 (R_RISCV_IMM8_GET_BIT(imm8, 5) << 2))
171 /** @brief  Generate mask for immediate in compressed B-type RISC-V instruction
180 	 (R_RISCV_IMM8_GET_BIT(imm8, 6) << 5) | (R_RISCV_IMM8_GET_BIT(imm8, 2) << 4) |             \
181 	 (R_RISCV_IMM8_GET_BIT(imm8, 1) << 3) | (R_RISCV_IMM8_GET_BIT(imm8, 5) << 2))
185  * @param operand Address of RISC-V instruction, B-type
192  * @param operand Address of RISC-V instruction, B-type
201  * @param operand Address of RISC-V instruction, J-type
208  * @param operand Address of RISC-V instruction, J-type
217  * @param operand Address of RISC-V instruction, S-type
224  * @param operand Address of RISC-V instruction, S-type
233  * @param operand Address of RISC-V instruction, compressed-J-type
240  * @param operand Address of RISC-V instruction, compressed-J-type
249  * @param operand Address of RISC-V instruction, compressed-B-type
256  * @param operand Address of RISC-V instruction, compressed-B-type
265  * @param operand Address of RISC-V instruction, U-type
272  * @param operand Address of RISC-V instruction, U-type
281  * @param operand Address of RISC-V instruction, I-type
288  * @param operand Address of RISC-V instruction, I-type