Lines Matching +full:interrupts +full:- +full:extended

4  * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/clock/imx_ccm.h>
13 		#address-cells = <1>;
14 		#size-cells = <0>;
18 			compatible = "cdns,tensilica-xtensa-lx6";
21 			#address-cells = <1>;
22 			#size-cells = <0>;
24 			clic: interrupt-controller@0 {
25 				compatible = "cdns,xtensa-core-intc";
27 				interrupt-controller;
28 				#interrupt-cells = <3>;
35 		compatible = "mmio-sram";
41 		compatible = "mmio-sram";
46 		compatible = "fixed-clock";
47 		#clock-cells = <0>;
48 		clock-frequency = <12288000>;
52 		irqsteer: interrupt-controller@30a80000 {
53 			compatible = "nxp,irqsteer-intc";
56 			#size-cells = <0>;
57 			#address-cells = <1>;
59 			master0: interrupt-controller@0 {
60 				compatible = "nxp,irqsteer-master";
62 				interrupt-controller;
63 				#interrupt-cells = <1>;
64 				interrupts-extended = <&clic 19 0 0>;
67 			master1: interrupt-controller@1 {
68 				compatible = "nxp,irqsteer-master";
70 				interrupt-controller;
71 				#interrupt-cells = <1>;
72 				interrupts-extended = <&clic 20 0 0>;
75 			master2: interrupt-controller@2 {
76 				compatible = "nxp,irqsteer-master";
78 				interrupt-controller;
79 				#interrupt-cells = <1>;
80 				interrupts-extended = <&clic 21 0 0>;
85 			compatible = "nxp,imx-ccm";
87 			#clock-cells = <3>;
93 			interrupt-parent = <&master1>;
94 			interrupts = <2 0 0>;
95 			#dma-cells = <2>;
100 			compatible = "nxp,dai-sai";
103 			mclk-is-output;
105 			clock-names = "mclk1";
107 			interrupt-parent = <&master1>;
108 			interrupts = <18>;
109 			dai-index = <3>;
112 			dma-names = "tx", "rx";
117 			compatible = "nxp,imx-iomuxc";
122 				compatible = "nxp,imx8mp-pinctrl";
131 			compatible = "nxp,imx-iuart";
134 			 * until we can support UART interrupts
136 			interrupt-parent = <&master0>;
137 			interrupts = <29 0 0>;
143 			compatible = "nxp,imx-mu";
145 			interrupt-parent = <&clic>;
146 			interrupts = <7 0 0>;