Lines Matching +full:resource +full:- +full:id

4  * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/clock/imx_ccm.h>
10 #include <zephyr/dt-bindings/dai/esai.h>
11 #include <zephyr/dt-bindings/power/imx_scu_rsrc.h>
15 		#address-cells = <1>;
16 		#size-cells = <0>;
20 			compatible = "cdns,tensilica-xtensa-lx6";
23 			#address-cells = <1>;
24 			#size-cells = <0>;
26 			clic: interrupt-controller@0 {
27 				compatible = "cdns,xtensa-core-intc";
29 				interrupt-controller;
30 				#interrupt-cells = <3>;
35 	scu: system-controller {
36 		ccm: clock-controller {
37 			compatible = "nxp,imx-ccm";
38 			#clock-cells = <3>;
42 			compatible = "nxp,imx-iomuxc-scu";
44 				compatible = "nxp,imx8-pinctrl";
48 		power-domains {
49 			#address-cells = <1>;
50 			#size-cells = <0>;
53 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
55 				nxp,resource-id = <IMX_SC_R_IRQSTR_DSP>;
56 				#power-domain-cells = <0>;
60 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
62 				nxp,resource-id = <IMX_SC_R_DMA_0_CH6>;
63 				#power-domain-cells = <0>;
67 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
69 				nxp,resource-id = <IMX_SC_R_DMA_0_CH7>;
70 				#power-domain-cells = <0>;
74 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
76 				nxp,resource-id = <IMX_SC_R_DMA_0_CH14>;
77 				#power-domain-cells = <0>;
81 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
83 				nxp,resource-id = <IMX_SC_R_DMA_0_CH15>;
84 				#power-domain-cells = <0>;
88 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
90 				nxp,resource-id = <IMX_SC_R_DMA_2_CH6>;
91 				#power-domain-cells = <0>;
95 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
97 				nxp,resource-id = <IMX_SC_R_DMA_2_CH7>;
98 				#power-domain-cells = <0>;
102 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
104 				nxp,resource-id = <IMX_SC_R_DMA_2_CH14>;
105 				#power-domain-cells = <0>;
109 				compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd";
111 				nxp,resource-id = <IMX_SC_R_DMA_2_CH15>;
112 				#power-domain-cells = <0>;
119 		compatible = "mmio-sram";
125 		compatible = "mmio-sram";
132 		valid-channels = <6>, <7>, <14>, <15>;
133 		power-domains = <&edma0_ch6_pd>, <&edma0_ch7_pd>,
135 		interrupts-extended = <&master6 58>, <&master6 58>,
137 		#dma-cells = <2>;
142 		compatible = "nxp,dai-sai";
144 		interrupt-parent = <&master5>;
147 		clock-names = "bus";
148 		dai-index = <1>;
150 		dma-names = "tx", "rx";
155 		compatible = "nxp,dai-esai";
158 		dma-names = "tx", "rx";
159 		esai-pin-modes = <ESAI_PIN_HCKR ESAI_PIN_DISCONNECTED>,
174 		compatible = "nxp,imx-lpuart", "nxp,lpuart";
176 		interrupt-parent = <&master4>;
184 		compatible = "nxp,imx-mu";
186 		interrupt-parent = <&clic>;