Lines Matching +full:vendor +full:- +full:id
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/pcie/pcie.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "intel,elkhart-lake", "intel,x86_64";
20 d-cache-line-size = <64>;
38 #address-cells = <1>;
39 #interrupt-cells = <3>;
41 interrupt-controller;
47 interrupt-controller;
48 #interrupt-cells = <3>;
49 #address-cells = <1>;
53 #address-cells = <1>;
54 #size-cells = <1>;
55 compatible = "pcie-controller";
56 acpi-hid = "PNP0A08";
60 compatible = "ptm-root";
62 vendor-id = <0x8086>;
63 device-id = <0x4b38>;
71 vendor-id = <0x8086>;
72 device-id = <0x4b28>;
74 reg-shift = <2>;
75 clock-frequency = <1843200>;
77 interrupt-parent = <&intc>;
79 current-speed = <115200>;
85 vendor-id = <0x8086>;
86 device-id = <0x4b29>;
88 reg-shift = <2>;
89 clock-frequency = <1843200>;
91 interrupt-parent = <&intc>;
94 current-speed = <115200>;
100 vendor-id = <0x8086>;
101 device-id = <0x4b4d>;
103 reg-shift = <2>;
104 clock-frequency = <1843200>;
106 interrupt-parent = <&intc>;
109 current-speed = <115200>;
115 vendor-id = <0x8086>;
116 device-id = <0x4b96>;
118 reg-shift = <2>;
119 clock-frequency = <1843200>;
121 interrupt-parent = <&intc>;
124 current-speed = <115200>;
130 vendor-id = <0x8086>;
131 device-id = <0x4b97>;
133 reg-shift = <2>;
134 clock-frequency = <1843200>;
136 interrupt-parent = <&intc>;
139 current-speed = <115200>;
145 vendor-id = <0x8086>;
146 device-id = <0x4b98>;
148 reg-shift = <2>;
149 clock-frequency = <1843200>;
151 interrupt-parent = <&intc>;
154 current-speed = <115200>;
160 vendor-id = <0x8086>;
161 device-id = <0x4b99>;
163 reg-shift = <2>;
164 clock-frequency = <1843200>;
166 interrupt-parent = <&intc>;
169 current-speed = <115200>;
175 vendor-id = <0x8086>;
176 device-id = <0x4b9a>;
178 reg-shift = <2>;
179 clock-frequency = <1843200>;
181 interrupt-parent = <&intc>;
184 current-speed = <115200>;
190 vendor-id = <0x8086>;
191 device-id = <0x4b9b>;
193 reg-shift = <2>;
194 clock-frequency = <1843200>;
196 interrupt-parent = <&intc>;
199 current-speed = <115200>;
203 compatible = "intel,pch-smbus";
204 #address-cells = <1>;
205 #size-cells = <0>;
206 vendor-id = <0x8086>;
207 device-id = <0x4b23>;
209 interrupt-parent = <&intc>;
215 compatible = "snps,designware-i2c";
216 clock-frequency = <I2C_BITRATE_STANDARD>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 vendor-id = <0x8086>;
220 device-id = <0x4b78>;
222 interrupt-parent = <&intc>;
228 compatible = "snps,designware-i2c";
229 clock-frequency = <I2C_BITRATE_STANDARD>;
230 #address-cells = <1>;
231 #size-cells = <0>;
232 vendor-id = <0x8086>;
233 device-id = <0x4b79>;
235 interrupt-parent = <&intc>;
241 compatible = "snps,designware-i2c";
242 clock-frequency = <I2C_BITRATE_STANDARD>;
243 #address-cells = <1>;
244 #size-cells = <0>;
245 vendor-id = <0x8086>;
246 device-id = <0x4b7a>;
248 interrupt-parent = <&intc>;
254 compatible = "snps,designware-i2c";
255 clock-frequency = <I2C_BITRATE_STANDARD>;
256 #address-cells = <1>;
257 #size-cells = <0>;
258 vendor-id = <0x8086>;
259 device-id = <0x4b7b>;
261 interrupt-parent = <&intc>;
267 compatible = "snps,designware-i2c";
268 clock-frequency = <I2C_BITRATE_STANDARD>;
269 #address-cells = <1>;
270 #size-cells = <0>;
271 vendor-id = <0x8086>;
272 device-id = <0x4b4b>;
274 interrupt-parent = <&intc>;
280 compatible = "snps,designware-i2c";
281 clock-frequency = <I2C_BITRATE_STANDARD>;
282 #address-cells = <1>;
283 #size-cells = <0>;
284 vendor-id = <0x8086>;
285 device-id = <0x4b4c>;
287 interrupt-parent = <&intc>;
293 compatible = "snps,designware-i2c";
294 clock-frequency = <I2C_BITRATE_STANDARD>;
295 #address-cells = <1>;
296 #size-cells = <0>;
297 vendor-id = <0x8086>;
298 device-id = <0x4b44>;
300 interrupt-parent = <&intc>;
306 compatible = "snps,designware-i2c";
307 clock-frequency = <I2C_BITRATE_STANDARD>;
308 #address-cells = <1>;
309 #size-cells = <0>;
310 vendor-id = <0x8086>;
311 device-id = <0x4b45>;
313 interrupt-parent = <&intc>;
319 compatible = "snps,designware-i2c";
320 clock-frequency = <I2C_BITRATE_STANDARD>;
321 #address-cells = <1>;
322 #size-cells = <0>;
323 vendor-id = <0x8086>;
324 device-id = <0x4bb9>;
326 interrupt-parent = <&intc>;
332 compatible = "snps,designware-i2c";
333 clock-frequency = <I2C_BITRATE_STANDARD>;
334 #address-cells = <1>;
335 #size-cells = <0>;
336 vendor-id = <0x8086>;
337 device-id = <0x4bba>;
339 interrupt-parent = <&intc>;
345 compatible = "snps,designware-i2c";
346 clock-frequency = <I2C_BITRATE_STANDARD>;
347 #address-cells = <1>;
348 #size-cells = <0>;
349 vendor-id = <0x8086>;
350 device-id = <0x4bbb>;
352 interrupt-parent = <&intc>;
358 compatible = "snps,designware-i2c";
359 clock-frequency = <I2C_BITRATE_STANDARD>;
360 #address-cells = <1>;
361 #size-cells = <0>;
362 vendor-id = <0x8086>;
363 device-id = <0x4bbc>;
365 interrupt-parent = <&intc>;
371 compatible = "snps,designware-i2c";
372 clock-frequency = <I2C_BITRATE_STANDARD>;
373 #address-cells = <1>;
374 #size-cells = <0>;
375 vendor-id = <0x8086>;
376 device-id = <0x4bbd>;
378 interrupt-parent = <&intc>;
384 compatible = "snps,designware-i2c";
385 clock-frequency = <I2C_BITRATE_STANDARD>;
386 #address-cells = <1>;
387 #size-cells = <0>;
388 vendor-id = <0x8086>;
389 device-id = <0x4bbe>;
391 interrupt-parent = <&intc>;
397 compatible = "snps,designware-i2c";
398 clock-frequency = <I2C_BITRATE_STANDARD>;
399 #address-cells = <1>;
400 #size-cells = <0>;
401 vendor-id = <0x8086>;
402 device-id = <0x4bbf>;
404 interrupt-parent = <&intc>;
411 #address-cells = <1>;
412 #size-cells = <1>;
413 compatible = "simple-bus";
417 compatible = "intel,vt-d";
429 reg-shift = <0>;
431 clock-frequency = <1843200>;
433 interrupt-parent = <&intc>;
436 current-speed = <115200>;
443 reg-shift = <0>;
445 clock-frequency = <1843200>;
447 interrupt-parent = <&intc>;
450 current-speed = <115200>;
457 interrupt-parent = <&intc>;
459 group-index = <0x0>;
460 gpio-controller;
461 #gpio-cells = <2>;
464 pin-offset = <0>;
473 interrupt-parent = <&intc>;
475 group-index = <0x1>;
476 gpio-controller;
477 #gpio-cells = <2>;
480 pin-offset = <26>;
489 interrupt-parent = <&intc>;
491 group-index = <0x2>;
492 gpio-controller;
493 #gpio-cells = <2>;
496 pin-offset = <42>;
505 interrupt-parent = <&intc>;
507 group-index = <0x0>;
508 gpio-controller;
509 #gpio-cells = <2>;
512 pin-offset = <0>;
521 interrupt-parent = <&intc>;
523 group-index = <0x1>;
524 gpio-controller;
525 #gpio-cells = <2>;
528 pin-offset = <16>;
537 interrupt-parent = <&intc>;
539 group-index = <0x2>;
540 gpio-controller;
541 #gpio-cells = <2>;
544 pin-offset = <40>;
553 interrupt-parent = <&intc>;
555 group-index = <0x3>;
556 gpio-controller;
557 #gpio-cells = <2>;
560 pin-offset = <61>;
569 interrupt-parent = <&intc>;
571 group-index = <0x4>;
572 gpio-controller;
573 #gpio-cells = <2>;
576 pin-offset = <85>;
585 interrupt-parent = <&intc>;
587 group-index = <0x1>;
588 gpio-controller;
589 #gpio-cells = <2>;
592 pin-offset = <17>;
601 interrupt-parent = <&intc>;
603 group-index = <0x2>;
604 gpio-controller;
605 #gpio-cells = <2>;
608 pin-offset = <25>;
617 interrupt-parent = <&intc>;
619 group-index = <0x3>;
620 gpio-controller;
621 #gpio-cells = <2>;
624 pin-offset = <49>;
633 interrupt-parent = <&intc>;
635 group-index = <0x0>;
636 gpio-controller;
637 #gpio-cells = <2>;
640 pin-offset = <0>;
649 interrupt-parent = <&intc>;
651 group-index = <0x1>;
652 gpio-controller;
653 #gpio-cells = <2>;
656 pin-offset = <24>;
665 interrupt-parent = <&intc>;
667 group-index = <0x3>;
668 gpio-controller;
669 #gpio-cells = <2>;
672 pin-offset = <57>;
681 interrupt-parent = <&intc>;
683 group-index = <0x0>;
684 gpio-controller;
685 #gpio-cells = <2>;
688 pin-offset = <0>;
697 interrupt-parent = <&intc>;
703 compatible = "intel,tco-wdt";
713 interrupt-parent = <&intc>;
714 alarms-count = <1>;