Lines Matching +full:address +full:- +full:1
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
18 clock-frequency = <0>;
23 hlic0: interrupt-controller {
24 compatible = "riscv,cpu-intc";
25 #address-cells = <0>;
26 #interrupt-cells = <1>;
27 interrupt-controller;
31 cpu@1 {
32 clock-frequency = <0>;
37 hlic1: interrupt-controller {
38 compatible = "riscv,cpu-intc";
39 #address-cells = <0>;
40 #interrupt-cells = <1>;
41 interrupt-controller;
46 clock-frequency = <0>;
51 hlic2: interrupt-controller {
52 compatible = "riscv,cpu-intc";
53 #address-cells = <0>;
54 #interrupt-cells = <1>;
55 interrupt-controller;
60 clock-frequency = <0>;
65 hlic3: interrupt-controller {
66 compatible = "riscv,cpu-intc";
67 #address-cells = <0>;
68 #interrupt-cells = <1>;
69 interrupt-controller;
74 clock-frequency = <0>;
79 hlic4: interrupt-controller {
80 compatible = "riscv,cpu-intc";
81 #address-cells = <0>;
82 #interrupt-cells = <1>;
83 interrupt-controller;
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "simple-bus";
95 compatible = "mmio-sram";
100 compatible = "mmio-sram";
106 interrupts-extended = <&hlic0 3 &hlic0 7
111 interrupt-names = "soft0", "timer0", "soft1", "timer1",
117 plic: interrupt-controller@c000000 {
118 compatible = "sifive,plic-1.0.0";
119 #interrupt-cells = <2>;
120 #address-cells = <1>;
121 interrupt-controller;
122 interrupts-extended = <&hlic0 11
128 riscv,max-priority = <7>;
133 compatible = "microchip,mpfs-mailbox";
136 interrupt-parent = <&plic>;
137 interrupts = <96 1>;
138 #mbox-cells = <1>;
145 clock-frequency = <150000000>;
146 current-speed = <115200>;
147 interrupt-parent = <&plic>;
148 interrupts = <90 1>;
149 reg-shift = <2>;
156 clock-frequency = <150000000>;
157 current-speed = <115200>;
158 interrupt-parent = <&plic>;
159 interrupts = <91 1>;
160 reg-shift = <2>;
167 clock-frequency = <150000000>;
168 current-speed = <115200>;
169 interrupt-parent = <&plic>;
170 interrupts = <92 1>;
171 reg-shift = <2>;
178 clock-frequency = <150000000>;
179 current-speed = <115200>;
180 interrupt-parent = <&plic>;
181 interrupts = <93 1>;
182 reg-shift = <2>;
189 clock-frequency = <150000000>;
190 current-speed = <115200>;
191 interrupt-parent = <&plic>;
192 interrupts = <94 1>;
193 reg-shift = <2>;
198 compatible = "microchip,mpfs-qspi";
199 #address-cells = <1>;
200 #size-cells = <0>;
202 interrupt-parent = <&plic>;
203 interrupts = <85 1>;
205 clock-frequency = <150000000>;
209 compatible = "microchip,mpfs-spi";
210 #address-cells = <1>;
211 #size-cells = <0>;
213 interrupt-parent = <&plic>;
214 interrupts = <55 1>;
216 clock-frequency = <150000000>;
220 compatible = "microchip,mpfs-qspi";
221 #address-cells = <1>;
222 #size-cells = <0>;
224 interrupt-parent = <&plic>;
225 interrupts = <110 1>;
227 clock-frequency = <150000000>;
231 compatible = "microchip,mpfs-gpio";
233 interrupt-parent = <&plic>;
234 interrupts = <51 1>;
235 interrupt-controller;
236 #interrupt-cells = <1>;
237 gpio-controller;
238 #gpio-cells = <2>;
244 compatible = "microchip,mpfs-gpio";
246 interrupt-parent = <&plic>;
247 interrupts = <52 1>;
248 interrupt-controller;
249 #interrupt-cells = <1>;
250 gpio-controller;
251 #gpio-cells = <2>;
257 compatible = "microchip,mpfs-gpio";
259 interrupt-parent = <&plic>;
260 interrupts = <53 1>;
261 interrupt-controller;
262 #interrupt-cells = <1>;
263 gpio-controller;
264 #gpio-cells = <2>;
270 compatible = "microchip,mpfs-i2c";
272 interrupt-parent = <&plic>;
273 interrupts = <58 1>;
274 #address-cells = <1>;
275 #size-cells = <0>;
276 clock-frequency = <100000>;
281 compatible = "microchip,mpfs-i2c";
283 interrupt-parent = <&plic>;
284 interrupts = <61 1>;
285 #address-cells = <1>;
286 #size-cells = <0>;
287 clock-frequency = <100000>;