Lines Matching refs:rctl
72 rctl: reset-controller { label
73 compatible = "gd,gd32-rctl";
98 resets = <&rctl GD32_RESET_USART0>;
107 resets = <&rctl GD32_RESET_USART1>;
116 resets = <&rctl GD32_RESET_USART2>;
125 resets = <&rctl GD32_RESET_UART3>;
134 resets = <&rctl GD32_RESET_UART4>;
143 resets = <&rctl GD32_RESET_ADC0>;
154 resets = <&rctl GD32_RESET_ADC1>;
164 resets = <&rctl GD32_RESET_DAC>;
179 resets = <&rctl GD32_RESET_I2C0>;
188 resets = <&rctl GD32_RESET_SPI0>;
199 resets = <&rctl GD32_RESET_SPI1>;
236 resets = <&rctl GD32_RESET_WWDGT>;
254 resets = <&rctl GD32_RESET_GPIOA>;
264 resets = <&rctl GD32_RESET_GPIOB>;
274 resets = <&rctl GD32_RESET_GPIOC>;
284 resets = <&rctl GD32_RESET_GPIOD>;
294 resets = <&rctl GD32_RESET_GPIOE>;
305 resets = <&rctl GD32_RESET_TIMER0>;
323 resets = <&rctl GD32_RESET_TIMER1>;
340 resets = <&rctl GD32_RESET_TIMER2>;
357 resets = <&rctl GD32_RESET_TIMER3>;
374 resets = <&rctl GD32_RESET_TIMER4>;
391 resets = <&rctl GD32_RESET_TIMER5>;
402 resets = <&rctl GD32_RESET_TIMER6>;