Lines Matching +full:data +full:- +full:bus +full:- +full:width
2 # SPDX-License-Identifier: Apache-2.0
8 data receivers, video data processors, etc. Data interfaces on these devices are
13 bus, an 'endpoint' child node must be provided for each of them. If more than one
16 scheme using '#address-cells', '#size-cells' and 'reg' properties is used.
19 specify #address-cells, #size-cells properties independently for the 'port' and
25 #address-cells = <1>;
26 #size-cells = <0>;
37 Two 'endpoint' nodes must be linked with each other via their 'remote-endpoint'
39 references are currently not possible. A 'remote-endpoint-label' string is used
40 instead to be able to specify, at least, the label of the peer remote-endpoint.
44 compatible = "zephyr,video-interfaces";
45 remote-endpoint-label = "sink";
49 compatible = "zephyr,video-interfaces";
50 remote-endpoint-label = "source";
54 subnode for data exchange with other device. In most cases, properties at the
56 there is any signal modifications on the bus between two devices, e.g. there are
60 remote-endpoint-label:
64 Label of the 'remote-endpoint' subnode that interfaces with this endpoint.
65 This property is used as a 'work-around' to be able to declare the remote
66 endpoint and should be replaced by a "remote-endpoint" phandle property when
69 bus-type:
72 - 1 # MIPI CSI-2 C-PHY
73 - 2 # MIPI CSI1
74 - 3 # CCP2
75 - 4 # MIPI CSI-2 D-PHY
76 - 5 # Parallel
77 - 6 # BT.656
79 Data bus type.
81 data-shift:
84 On parallel data busses, if bus-width is used to specify the number of
85 data lines, data-shift can be used to specify which data lines are used,
86 e.g. "bus-width=<8>; data-shift=<2>;" means, that lines 9:2 are used.
88 hsync-active:
91 - 0 # low
92 - 1 # high
96 vsync-active:
99 - 0 # low
100 - 1 # high
104 pclk-sample:
107 - 0 # falling
108 - 1 # rising
109 - 2 # both
111 Sample data on falling, rising or both edges of the pixel clock signal.
113 link-frequencies:
116 Allowed data bus frequencies. For MIPI CSI-2, for instance, this is the
117 actual frequency of the bus, not bits per clock per lane value.
119 # For serial bus only
120 clock-lane:
125 a MIPI CSI-2 bus we could have "clock-lane = <0>;", which places the
127 only (e.g. MIPI CSI-2).
129 data-lanes:
132 An array of physical data lane indexes. Position of an entry determines
134 lane, e.g. for 2-lane MIPI CSI-2 bus we could have "data-lanes = <1 2>;",
138 lane. This property is valid for serial busses only (e.g. MIPI CSI-2).
140 # For parallel bus only
141 bus-width:
144 Number of data lines actively used, only valid for parallel busses.