Lines Matching +full:timers +full:- +full:count

1 # Copyright (c) 2023-2024 Analog Devices, Inc.
2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "adi,max32-timer"
8 include: [base.yaml, reset-device.yaml]
17   clock-source:
23       - 0: "ADI_MAX32_PRPH_CLK_SRC_PCLK" Peripheral clock
24       - 1: "ADI_MAX32_PRPH_CLK_SRC_EXTCLK" External Clock
25       - 2: "ADI_MAX32_PRPH_CLK_SRC_IBRO" Internal Baud Rate Oscillator
26       - 3: "ADI_MAX32_PRPH_CLK_SRC_ERFO" External Radio Frequency Oscillator
27       - 4: "ADI_MAX32_PRPH_CLK_SRC_ERTCO" External Real-Time Clock Oscillator
28       - 5: "ADI_MAX32_PRPH_CLK_SRC_INRO" Internal Ring Oscillator
29       - 6: "ADI_MAX32_PRPH_CLK_SRC_ISO" Internal Secondary Oscillator
30       - 7: "ADI_MAX32_PRPH_CLK_SRC_IBRO_DIV8" IBRO/8
38       - 1
39       - 2
40       - 4
41       - 8
42       - 16
43       - 32
44       - 64
45       - 128
46       - 256
47       - 512
48       - 1024
49       - 2048
50       - 4096
52       The prescaler that divides the timers source clock to set the timers count clock as follows: