Lines Matching +full:spi +full:- +full:cs +full:- +full:sck +full:- +full:delay

1 # Copyright 2022-2023 NXP
2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP S32 SPI controller
6 compatible: "nxp,s32-spi"
8 include: [spi-controller.yaml, pinctrl-device.yaml]
17   num-cs:
26   pinctrl-0:
29   pinctrl-names:
35       Select if the SPI module is intended to be used in slave mode.
37   spi-sck-cs-delay:
40       A delay in nanoseconds between the stop of clock signal and
41       deactivating Chip Select at the stop of transfer. If CS remains
42       asserted between transfer, this delay will be inserted between transfer.
43       If not set, the minimum supported delay is used.
44       This value will affect to all inner CS signals of SPI module when active.
45       This value will not be applied for CS lines controlled by GPIO.
47   spi-cs-sck-delay:
50       A delay in nanoseconds between activating Chip Select and the start
51       of clock signal at the start of transfer. If CS remains asserted
52       between transfer, this delay will be inserted between transfer.
53       If not set, the minimum supported delay is used.
54       This value will affect to all inner CS signals of SPI module when active.
55       This value will not be applied for CS lines controlled by GPIO.
57   spi-cs-cs-delay:
60       A delay in nanoseconds between deactivating Chip Select at the stop
62       next transfer. If CS remains asserted between transfer, this delay
64       If not set, the minimum supported delay is used.
65       This value will affect to all inner CS signals of SPI module when active.
66       This value will not be applied for CS lines controlled by GPIO.