Lines Matching +full:irq +full:- +full:shared +full:- +full:offset

3 compatible: "infineon,xmc4xxx-uart"
5 include: [uart-controller.yaml, pinctrl-device.yaml]
11   input-src:
20       - "DX0A"
21       - "DX0B"
22       - "DX0C"
23       - "DX0D"
24       - "DX0E"
25       - "DX0F"
26       - "DX0G"
28   pinctrl-0:
31   pinctrl-names:
34   fifo-start-offset:
36       Each USIC0..2 has a fifo that is shared between two channels. For example,
37       usic0ch0 and usic0ch1 will share the same fifo. This parameter defines an offset
39       define the offset based on the configuration of the other channel. The fifo has a
40       capacity of 64 entries. The tx/rx fifos are created on fifo-xx-size aligned
46   fifo-tx-size:
50       then fifo-tx-size should be set to 0.
54       - 0
55       - 2
56       - 4
57       - 8
58       - 16
59       - 32
60       - 64
62   fifo-rx-size:
66       then fifo-rx-size should be set to 0.
70       - 0
71       - 2
72       - 4
73       - 8
74       - 16
75       - 32
76       - 64
80       IRQ number and priority to use for interrupt driven UART.
102          simple mapping: in USIC0 interrupt 84->SR0, interrupt 85->SR1, ... etc.
103          In USIC1, interrupt 90->SR0, 91->SR1, etc.
112   dma-names:
118          dma-names = "tx", "rx";